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From: Nicolas Pitre <nicolas.pitre@linaro.org>
To: Cyril Chemparathy <cyril@ti.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, arnd@arndb.de,
	catalin.marinas@arm.com, grant.likely@secretlab.ca,
	linux@arm.linux.org.uk, will.deacon@arm.com,
	Vitaly Andrianov <vitalya@ti.com>
Subject: Re: [PATCH v3 10/17] ARM: LPAE: use phys_addr_t in switch_mm()
Date: Fri, 21 Sep 2012 14:33:43 -0400 (EDT)	[thread overview]
Message-ID: <alpine.LFD.2.02.1209211433110.6667@xanadu.home> (raw)
In-Reply-To: <1347385155-11643-11-git-send-email-cyril@ti.com>

On Tue, 11 Sep 2012, Cyril Chemparathy wrote:

> This patch modifies the switch_mm() processor functions to use phys_addr_t.
> On LPAE systems, we now honor the upper 32-bits of the physical address that
> is being passed in, and program these into TTBR as expected.
> 
> Signed-off-by: Cyril Chemparathy <cyril@ti.com>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>

Reviewed-by: Nicolas Pitre <nico@linaro.org>

> ---
>  arch/arm/include/asm/proc-fns.h |    4 ++--
>  arch/arm/mm/proc-v7-3level.S    |   17 +++++++++++++----
>  2 files changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
> index f3628fb..75b5f14 100644
> --- a/arch/arm/include/asm/proc-fns.h
> +++ b/arch/arm/include/asm/proc-fns.h
> @@ -60,7 +60,7 @@ extern struct processor {
>  	/*
>  	 * Set the page table
>  	 */
> -	void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);
> +	void (*switch_mm)(phys_addr_t pgd_phys, struct mm_struct *mm);
>  	/*
>  	 * Set a possibly extended PTE.  Non-extended PTEs should
>  	 * ignore 'ext'.
> @@ -82,7 +82,7 @@ extern void cpu_proc_init(void);
>  extern void cpu_proc_fin(void);
>  extern int cpu_do_idle(void);
>  extern void cpu_dcache_clean_area(void *, int);
> -extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
> +extern void cpu_do_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm);
>  #ifdef CONFIG_ARM_LPAE
>  extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
>  #else
> diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
> index 8de0f1d..c4f4251 100644
> --- a/arch/arm/mm/proc-v7-3level.S
> +++ b/arch/arm/mm/proc-v7-3level.S
> @@ -39,6 +39,14 @@
>  #define TTB_FLAGS_SMP	(TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA)
>  #define PMD_FLAGS_SMP	(PMD_SECT_WBWA|PMD_SECT_S)
>  
> +#ifndef __ARMEB__
> +#  define rpgdl	r0
> +#  define rpgdh	r1
> +#else
> +#  define rpgdl	r1
> +#  define rpgdh	r0
> +#endif
> +
>  /*
>   * cpu_v7_switch_mm(pgd_phys, tsk)
>   *
> @@ -47,10 +55,11 @@
>   */
>  ENTRY(cpu_v7_switch_mm)
>  #ifdef CONFIG_MMU
> -	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id
> -	and	r3, r1, #0xff
> -	mov	r3, r3, lsl #(48 - 32)		@ ASID
> -	mcrr	p15, 0, r0, r3, c2		@ set TTB 0
> +	ldr	r2, [r2, #MM_CONTEXT_ID]	@ get mm->context.id
> +	and	r2, r2, #0xff
> +	mov	r2, r2, lsl #(48 - 32)		@ ASID
> +	orr	rpgdh, rpgdh, r2		@ upper 32-bits of pgd phys
> +	mcrr	p15, 0, rpgdl, rpgdh, c2	@ set TTB 0
>  	isb
>  #endif
>  	mov	pc, lr
> -- 
> 1.7.9.5
> 

  reply	other threads:[~2012-09-21 18:33 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-11 17:38 [PATCH v3 00/17] LPAE fixes and extensions for Keystone Cyril Chemparathy
2012-09-11 17:38 ` [PATCH v3 01/17] ARM: add mechanism for late code patching Cyril Chemparathy
2012-09-21 18:09   ` Nicolas Pitre
2012-09-21 22:30     ` Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 02/17] ARM: add self test for runtime patch mechanism Cyril Chemparathy
2012-09-21 17:40   ` Nicolas Pitre
2012-09-21 22:25     ` Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 03/17] ARM: use late patch framework for phys-virt patching Cyril Chemparathy
2012-09-21 18:15   ` Nicolas Pitre
2012-09-11 17:39 ` [PATCH v3 04/17] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 05/17] ARM: LPAE: support 64-bit virt_to_phys patching Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 06/17] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 07/17] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 08/17] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 09/17] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-09-21 18:30   ` Nicolas Pitre
2012-09-11 17:39 ` [PATCH v3 10/17] ARM: LPAE: use phys_addr_t in switch_mm() Cyril Chemparathy
2012-09-21 18:33   ` Nicolas Pitre [this message]
2012-09-21 18:41     ` Russell King - ARM Linux
2012-09-21 18:53       ` Nicolas Pitre
2012-09-11 17:39 ` [PATCH v3 11/17] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 12/17] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 13/17] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 14/17] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 15/17] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 16/17] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-09-11 17:39 ` [PATCH v3 17/17] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-09-21 18:42   ` Nicolas Pitre
2012-09-21 22:49     ` Cyril Chemparathy

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