[PATCH 0/3] Enable RTC support on RZ/T2H and RZ/N2H SoCs

[PATCH 0/3] Enable RTC support on RZ/T2H and RZ/N2H SoCs

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi all,

This patch series adds RTC support for Renesas RZ/T2H and RZ/N2H SoCs and
enables support for it on the EVKs.

Note:
1. The patches apply on top of renesas-devel/renesas-dts-for-v7.4 branch.
2. The RTC driver patches have been queued up in the RTC maintainers tree.

Cheers,
Prabhakar

Lad Prabhakar (3):
  arm64: dts: renesas: r9a09g077: Add RTC node
  arm64: dts: renesas: r9a09g087: Add RTC node
  arm64: dts: renesas: rzt2h-n2h-evk: Enable RTC support

 arch/arm64/boot/dts/renesas/r9a09g077.dtsi          | 13 +++++++++++++
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi          | 13 +++++++++++++
 .../boot/dts/renesas/rzt2h-n2h-evk-common.dtsi      |  5 +++++
 3 files changed, 31 insertions(+)

-- 
2.43.0

[PATCH 1/3] arm64: dts: renesas: r9a09g077: Add RTC node

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add Real Time Clock (RTC) node to SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
index d5eafaf23e75..33f953c110bb 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
@@ -1173,6 +1173,19 @@ pinctrl: pinctrl@802c0000 {
 			power-domains = <&cpg>;
 		};
 
+		rtc0: rtc@81009000 {
+			compatible = "renesas,r9a09g077-rtc";
+			reg = <0 0x81009000 0 0x1000>;
+			interrupts = <GIC_SPI 495 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 497 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 496 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "alarm", "timer", "pps";
+			clocks = <&cpg CPG_MOD 605>, <&cpg CPG_CORE R9A09G077_PCLKRTC>;
+			clock-names = "hclk", "xtal";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@83000000 {
 			compatible = "arm,gic-v3";
 			reg = <0x0 0x83000000 0 0x40000>,
-- 
2.43.0

[PATCH 2/3] arm64: dts: renesas: r9a09g087: Add RTC node

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add Real Time Clock (RTC) node to SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
index fe9003426d70..d5b3eb6c1736 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
@@ -1176,6 +1176,19 @@ pinctrl: pinctrl@802c0000 {
 			power-domains = <&cpg>;
 		};
 
+		rtc0: rtc@81009000 {
+			compatible = "renesas,r9a09g087-rtc", "renesas,r9a09g077-rtc";
+			reg = <0 0x81009000 0 0x1000>;
+			interrupts = <GIC_SPI 495 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 497 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 496 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "alarm", "timer", "pps";
+			clocks = <&cpg CPG_MOD 605>, <&cpg CPG_CORE R9A09G087_PCLKRTC>;
+			clock-names = "hclk", "xtal";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@83000000 {
 			compatible = "arm,gic-v3";
 			reg = <0x0 0x83000000 0 0x40000>,
-- 
2.43.0

[PATCH 3/3] arm64: dts: renesas: rzt2h-n2h-evk: Enable RTC support

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable RTC support on RZ/T2H and RZ/N2H EVKs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
index ffcc0960903b..2a8414d6d632 100644
--- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
@@ -21,6 +21,7 @@ aliases {
 		mmc0 = &sdhi0;
 		mmc1 = &sdhi1;
 		serial0 = &sci0;
+		rtc0 = &rtc0;
 		spi0 = &xspi0;
 		spi1 = &xspi1;
 	};
@@ -514,6 +515,10 @@ xspi1_pins: xspi1-pins {
 	};
 };
 
+&rtc0 {
+	status = "okay";
+};
+
 &sci0 {
 	pinctrl-0 = <&sci0_pins>;
 	pinctrl-names = "default";
-- 
2.43.0

Re: [PATCH 3/3] arm64: dts: renesas: rzt2h-n2h-evk: Enable RTC support

[Wolfram Sang]

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> +		rtc0 = &rtc0;

Maybe 'rtc' instead of 'rtc0' throughout the patchset?

@Geert: do we have a rule for this? There is also only 'gic' instead of
'gic0'?


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Re: [PATCH 3/3] arm64: dts: renesas: rzt2h-n2h-evk: Enable RTC support

[Geert Uytterhoeven]

Hi Wolfram,

On Mon, 24 Aug 2026 at 11:26, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > +             rtc0 = &rtc0;
>
> Maybe 'rtc' instead of 'rtc0' throughout the patchset?
>
> @Geert: do we have a rule for this? There is also only 'gic' instead of
> 'gic0'?

There is only one GIC to rul'em all, but there can be multiple RTCs
in a system.

> What is this alias for? I don't think this is HW description?

I understand rtc0 is the main RTC.

drivers/rtc/class.c:            of_id = of_alias_get_id(dev->of_node, "rtc");
drivers/rtc/class.c:            of_id =
of_alias_get_id(dev->parent->of_node, "rtc");

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] arm64: dts: renesas: rzt2h-n2h-evk: Enable RTC support

[Wolfram Sang]

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> +		rtc0 = &rtc0;

What is this alias for? I don't think this is HW description?


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