From: Nicolin Chen <nicolinc@nvidia.com>
To: "Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org>
Cc: <linux-coco@lists.linux.dev>, <kvmarm@lists.linux.dev>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Alexey Kardashevskiy <aik@amd.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Dan Williams <dan.j.williams@intel.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>, Joerg Roedel <joro@8bytes.org>,
Jonathan Cameron <jic23@kernel.org>,
Marc Zyngier <maz@kernel.org>,
Pranjal Shrivastava <praan@google.com>,
Robin Murphy <robin.murphy@arm.com>,
Samuel Ortiz <sameo@rivosinc.com>,
Steven Price <steven.price@arm.com>,
Suzuki K Poulose <Suzuki.Poulose@arm.com>,
Will Deacon <will@kernel.org>,
Xu Yilun <yilun.xu@linux.intel.com>
Subject: Re: [RFC PATCH v4 01/16] iommu/arm-smmu-v3: Discover RME support and realm IRQ topology
Date: Sat, 29 Aug 2026 11:22:09 -0700 [thread overview]
Message-ID: <apMjUSbxcnlAKjks@nvidia.com> (raw)
In-Reply-To: <20260427085344.941627-2-aneesh.kumar@kernel.org>
On Mon, Apr 27, 2026 at 02:23:29PM +0530, Aneesh Kumar K.V (Arm) wrote:
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-realm.c
> @@ -0,0 +1,124 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2026 ARM Ltd.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <asm/rmi_smc.h>
> +#include <asm/rmi_cmds.h>
> +
> +#include "arm-smmu-v3.h"
> +
> +#define RMI_PSMMU_IRQ_GERROR BIT(0)
> +#define RMI_PSMMU_IRQ_EVENTQ BIT(1)
> +#define RMI_PSMMU_IRQ_PRIQ BIT(2)
> +#define RMI_PSMMU_IRQ_CMDQ BIT(3)
[...]
> + if (irq == smmu->realm_evtq_irq)
> + notify_flags = RMI_PSMMU_IRQ_EVENTQ;
> + else if (irq == smmu->realm_gerr_irq)
> + notify_flags = RMI_PSMMU_IRQ_GERROR;
> + else if (irq == smmu->realm_pri_irq)
> + notify_flags = RMI_PSMMU_IRQ_PRIQ;
These are defined as BIT(x)...
> + if (rmi_psmmu_irq_notify(smmu->base_phys,
> + notify_flags, &event)) {
[...]
> + rmi_psmmu_event_consume(smmu->base_phys, notify_flags);
.. and passed to RMI_PSMMU_IRQ_NOTIFY and RMI_PSMMU_EVENT_CONSUME.
RMI_PSMMU_IRQ_NOTIFY takes RmiPsmmuIrqSet type, which is a 4-bit
field that has a range of [BIT(0), BIT(3)]. So this is correct.
However, RMI_PSMMU_EVENT_CONSUME takes RmiPsmmuIrq type, which is
a 2-bit field that has a range of [0x0, 0x3]. So this seems wrong.
> +void arm_smmu_setup_realm_irqs(struct arm_smmu_device *smmu)
> +{
> + int irq, ret;
> +
> + irq = smmu->realm_evtq_irq;
> + if (irq) {
> + ret = devm_request_threaded_irq(smmu->dev, irq, NULL,
> + arm_smmu_realm_notify_thread,
> + IRQF_ONESHOT,
> + "arm-smmu-v3-realm-evtq",
> + smmu);
These IRQ numbers are raw numbers forwarded by firmware and then
returned by RMI_PSMMU_INFO:
+ if ((psmmu_info->flags & RMI_PSMMU_IRQCFG_MASK) ==
+ RMI_PSMMU_IRQCFG_IRQ_WIRED) {
+ smmu->realm_gerr_irq = psmmu_info->gerror_intr_num;
+ smmu->realm_evtq_irq = psmmu_info->eventq_intr_num;
+ smmu->realm_pri_irq = psmmu_info->priq_intr_num;
Should they be converted to Linux IRQ numbers before forwarded to
devm_request_threaded_irq?
> @@ -782,6 +787,9 @@ struct arm_smmu_device {
>
> int gerr_irq;
> int combined_irq;
> + int realm_gerr_irq;
> + int realm_evtq_irq;
> + int realm_pri_irq;
Nit: this series adds a few realm-specific things in the top SMMU
structure. Maybe a "struct arm_realm_psmmu" can make them clearer.
Thanks
Nicolin
next prev parent reply other threads:[~2026-08-29 18:22 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-27 8:53 [RFC PATCH v4 00/16] coco/TSM: Implement host-side support for Arm CCA TDISP setup Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 01/16] iommu/arm-smmu-v3: Discover RME support and realm IRQ topology Aneesh Kumar K.V (Arm)
2026-08-29 18:22 ` Nicolin Chen [this message]
2026-04-27 8:53 ` [RFC PATCH v4 02/16] iommu/arm-smmu-v3: Save the programmed MSI message in msi_desc Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 03/16] iommu/arm-smmu-v3: Add initial pSMMU realm viommu plumbing Aneesh Kumar K.V (Arm)
2026-08-29 20:00 ` Nicolin Chen
2026-04-27 8:53 ` [RFC PATCH v4 04/16] iommu/arm-smmu-v3: Track realm pSMMU users with refcount_t Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 05/16] coco: host: arm64: Add support for virtual device communication Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 06/16] coco: host: arm64: Add support for RMM vdev objects Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 07/16] coco: host: arm64: Add pdev stream key refresh and purge helpers Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 08/16] coco: host: arm64: Add helpers to unlock and destroy RMM vdev Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 09/16] coco: host: arm64: Add support for da object read RHI handling Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 10/16] coco: host: arm64: Add helper for cached object fetches Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 11/16] coco: host: arm64: Fetch interface report via RMI Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 12/16] coco: host: arm64: Fetch device measurements " Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 13/16] coco: host: KVM: arm64: Handle vdev validate-mapping exits Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 14/16] KVM: arm64: Unmap device mappings when a private granule is destroyed Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 15/16] coco: host: arm64: Transition vdevs to TDISP RUN state Aneesh Kumar K.V (Arm)
2026-04-27 8:53 ` [RFC PATCH v4 16/16] KVM: arm64: CCA: enable DA in realm create parameters Aneesh Kumar K.V (Arm)
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