* [PATCH v3 4/5] media: imx8-isi: Add i.MX952 ISI support
2026-09-15 10:51 [PATCH v3 0/5] media: imx8-isi: Add i.MX952 ISI support Guoniu Zhou
` (2 preceding siblings ...)
2026-09-15 10:51 ` [PATCH v3 3/5] media: dt-bindings: nxp,imx8-isi: Add i.MX952 ISI compatible string Guoniu Zhou
@ 2026-09-15 10:51 ` Guoniu Zhou
2026-09-15 10:51 ` [PATCH v3 5/5] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment Guoniu Zhou
4 siblings, 0 replies; 7+ messages in thread
From: Guoniu Zhou @ 2026-09-15 10:51 UTC (permalink / raw)
To: Laurent Pinchart, Frank Li, Mauro Carvalho Chehab, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Loic Poulain
Cc: linux-media, imx, linux-arm-kernel, linux-kernel, devicetree,
Guoniu Zhou
The i.MX952 ISI is reused from the i.MX95 ISI with a minor silicon
revision. It can process up to 8 image sources simultaneously and
obtain image data from up to 4 pixel link sources.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v3:
- Extend mask globally instead of per-platform (Laurent)
- Add Reviewed-by tag from Frank
---
drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 13 +++++++++++++
drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 1 +
drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index f2a8eb82fbfd..bedf8515b1e7 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -384,6 +384,18 @@ static const struct mxc_isi_plat_data mxc_imx95_data = {
.has_36bit_dma = true,
};
+static const struct mxc_isi_plat_data mxc_imx952_data = {
+ .model = MXC_ISI_IMX952,
+ .num_ports = 4,
+ .num_channels = 8,
+ .num_vc = 8,
+ .reg_offset = 0x10000,
+ .ier_reg = &mxc_imx8_isi_ier_v2,
+ .set_thd = &mxc_imx8_isi_thd_v1,
+ .buf_active_reverse = true,
+ .has_36bit_dma = true,
+};
+
/* -----------------------------------------------------------------------------
* Power management
*/
@@ -574,6 +586,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
{ .compatible = "fsl,imx91-isi", .data = &mxc_imx91_data },
{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
+ { .compatible = "fsl,imx952-isi", .data = &mxc_imx952_data },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
index 58b47335afc7..839693fe6e0e 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
@@ -164,6 +164,7 @@ enum model {
MXC_ISI_IMX91,
MXC_ISI_IMX93,
MXC_ISI_IMX95,
+ MXC_ISI_IMX952,
};
struct mxc_isi_plat_data {
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index c704be882705..5d166d670ae0 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
@@ -22,7 +22,7 @@
#define CHNL_CTRL_SW_RST BIT(24)
/*
* CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
- * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX95 only
+ * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
*/
#define CHNL_CTRL_BLANK_PXL(n) FIELD_PREP(GENMASK(23, 16), (n))
#define CHNL_CTRL_VC_ID_1(n) FIELD_PREP(BIT(16), (n))
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v3 5/5] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment
2026-09-15 10:51 [PATCH v3 0/5] media: imx8-isi: Add i.MX952 ISI support Guoniu Zhou
` (3 preceding siblings ...)
2026-09-15 10:51 ` [PATCH v3 4/5] media: imx8-isi: Add i.MX952 ISI support Guoniu Zhou
@ 2026-09-15 10:51 ` Guoniu Zhou
4 siblings, 0 replies; 7+ messages in thread
From: Guoniu Zhou @ 2026-09-15 10:51 UTC (permalink / raw)
To: Laurent Pinchart, Frank Li, Mauro Carvalho Chehab, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Loic Poulain
Cc: linux-media, imx, linux-arm-kernel, linux-kernel, devicetree,
Guoniu Zhou
On pre-i.MX95 platforms, the gasket provides LSB-aligned RAW data to
the ISI, so CHNL_IMG_CTRL_FORMAT_RAW16 works as a passthrough that
produces V4L2-compatible LSB-aligned output. Starting with i.MX95,
the gasket is replaced by the CSI formatter which always provides
MSB-aligned RAW data, so the RAW16 workaround produces MSB-aligned
output that no longer matches V4L2 RAW formats.
The i.MX952 ISI introduces CHNL_CTRL_RAW_OUT_LSB_ALIGN to address
this. Enable it so the driver produces correct LSB-aligned RAW10/12/14
output.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v3:
- Use CHNL_IMG_CTRL_FORMAT_MASK instead of the removed per-platform format_mask (Laurent)
- Derive raw_out_lsb from the model field instead of dedicated platform data (Laurent)
- Clarify the CHNL_IMG_CTRL_FORMAT_RAW14 comment: the format is
documented on i.MX{8ULP,91,93,95,952} but only used on i.MX952
- Update the mxc_isi_channel_set_output_format() comment wording
- Rewrite commit message to explain why the RAW16 workaround fails on i.MX95+ (Laurent)
- Add Reviewed-by tag from Frank
---
drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 50 +++++++++++++++++++++-
.../media/platform/nxp/imx8-isi/imx8-isi-regs.h | 4 ++
.../media/platform/nxp/imx8-isi/imx8-isi-video.c | 40 ++++++++---------
3 files changed, 73 insertions(+), 21 deletions(-)
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
index 6aa760ce3605..0832b4a110ed 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
@@ -303,11 +303,22 @@ static void mxc_isi_channel_set_panic_threshold(struct mxc_isi_pipe *pipe)
mxc_isi_write(pipe, CHNL_OUT_BUF_CTRL, val);
}
+/*
+ * Starting with i.MX952, the ISI can output RAW10/12/14 formats with LSB
+ * alignment, matching the V4L2 requirement. Older platforms lack this
+ * capability and need the RAW16 workaround.
+ */
+static bool isi_raw_out_lsb(const struct mxc_isi_plat_data *pdata)
+{
+ return pdata->model == MXC_ISI_IMX952;
+}
+
static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
enum mxc_isi_input_id input,
unsigned int vc,
bool bypass)
{
+ const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
u32 val;
mutex_lock(&pipe->lock);
@@ -357,6 +368,20 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
val |= CHNL_CTRL_VC_ID_1(vc >> 2);
}
+ if (isi_raw_out_lsb(pdata)) {
+ /*
+ * Enable RAW10/12/14 output LSB alignment to match the
+ * V4L2 requirement that RAW formats are LSB-aligned.
+ */
+ val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN;
+
+ /*
+ * Align the data selection from pixel link to MSB to
+ * avoid data shift since the data from PL is MSB.
+ */
+ val |= CHNL_CTRL_RAW_IN_MSB_ALIGN;
+ }
+
mxc_isi_write(pipe, CHNL_CTRL, val);
mutex_unlock(&pipe->lock);
@@ -406,10 +431,19 @@ void mxc_isi_channel_set_input_format(struct mxc_isi_pipe *pipe,
CHNL_IN_BUF_PITCH_LINE_PITCH(bpl));
}
+static bool isi_out_raw(u32 format)
+{
+ return format == CHNL_IMG_CTRL_FORMAT_RAW10 ||
+ format == CHNL_IMG_CTRL_FORMAT_RAW12 ||
+ format == CHNL_IMG_CTRL_FORMAT_RAW14;
+}
+
void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
const struct mxc_isi_format_info *info,
struct v4l2_pix_format_mplane *format)
{
+ const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
+ u32 fmt;
u32 val;
/* set outbuf format */
@@ -417,7 +451,21 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
val &= ~CHNL_IMG_CTRL_FORMAT_MASK;
- val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
+
+ /*
+ * Before i.MX952, the ISI shifts the 10/12/14-bit formats left
+ * by 6, 4 and 2 bits when using CHNL_IMG_CTRL_FORMAT_RAW10/12/14
+ * respectively, to align the bits to the left and pad with zeros in
+ * the LSBs. The corresponding V4L2 formats are however right-aligned,
+ * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
+ * Starting with i.MX952, the ISI supports RAW10/12/14 LSB output
+ * alignment, so skip the above workaround.
+ */
+ fmt = !isi_raw_out_lsb(pdata) && isi_out_raw(info->isi_out_format) ?
+ CHNL_IMG_CTRL_FORMAT_RAW16 :
+ info->isi_out_format;
+
+ val |= CHNL_IMG_CTRL_FORMAT(fmt);
mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
/* line pitch */
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index 5d166d670ae0..c11ee8061852 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
@@ -20,6 +20,8 @@
#define CHNL_CTRL_CHAIN_BUF_NO_CHAIN 0
#define CHNL_CTRL_CHAIN_BUF_2_CHAIN 1
#define CHNL_CTRL_SW_RST BIT(24)
+#define CHNL_CTRL_RAW_OUT_LSB_ALIGN BIT(23) /* i.MX952 only */
+#define CHNL_CTRL_RAW_IN_MSB_ALIGN BIT(22) /* i.MX{91,93,95,952} only */
/*
* CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
* CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
@@ -89,6 +91,8 @@
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P 0x3a
#define CHNL_IMG_CTRL_FORMAT_YUV420_2P12 0x3d
#define CHNL_IMG_CTRL_FORMAT_YUV420_3P12 0x3e
+#define CHNL_IMG_CTRL_FORMAT_RAW14 0x41 /* i.MX{8ULP,91,93,95,952}, used on i.MX952 only */
+
#define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n) ((n) << 16)
#define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK GENMASK(23, 16)
#define CHNL_IMG_CTRL_GBL_ALPHA_EN BIT(15)
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
index f45c2aae59ce..9a6a8302774c 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
@@ -221,11 +221,11 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
/*
* RAW formats
*
- * The ISI shifts the 10-bit and 12-bit formats left by 6 and 4 bits
- * when using CHNL_IMG_CTRL_FORMAT_RAW10 or MXC_ISI_OUT_FMT_RAW12
- * respectively, to align the bits to the left and pad with zeros in
- * the LSBs. The corresponding V4L2 formats are however right-aligned,
- * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
+ * The format entries use the native RAW10/12/14 ISI format codes.
+ * On platforms without hardware LSB alignment, the driver
+ * substitutes RAW16 at runtime in
+ * mxc_isi_channel_set_output_format() to avoid the left shift
+ * that the ISI applies to RAW10/12/14 output.
*/
{
.mbus_code = MEDIA_BUS_FMT_Y8_1X8,
@@ -240,7 +240,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_Y10_1X10,
.fourcc = V4L2_PIX_FMT_Y10,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -249,7 +249,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_Y12_1X12,
.fourcc = V4L2_PIX_FMT_Y12,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -258,7 +258,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_Y14_1X14,
.fourcc = V4L2_PIX_FMT_Y14,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -312,7 +312,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
.fourcc = V4L2_PIX_FMT_SBGGR10,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -321,7 +321,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
.fourcc = V4L2_PIX_FMT_SGBRG10,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -330,7 +330,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
.fourcc = V4L2_PIX_FMT_SGRBG10,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -339,7 +339,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
.fourcc = V4L2_PIX_FMT_SRGGB10,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -348,7 +348,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
.fourcc = V4L2_PIX_FMT_SBGGR12,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -357,7 +357,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12,
.fourcc = V4L2_PIX_FMT_SGBRG12,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -366,7 +366,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
.fourcc = V4L2_PIX_FMT_SGRBG12,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -375,7 +375,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12,
.fourcc = V4L2_PIX_FMT_SRGGB12,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -384,7 +384,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SBGGR14_1X14,
.fourcc = V4L2_PIX_FMT_SBGGR14,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -393,7 +393,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGBRG14_1X14,
.fourcc = V4L2_PIX_FMT_SGBRG14,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -402,7 +402,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SGRBG14_1X14,
.fourcc = V4L2_PIX_FMT_SGRBG14,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
@@ -411,7 +411,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
.mbus_code = MEDIA_BUS_FMT_SRGGB14_1X14,
.fourcc = V4L2_PIX_FMT_SRGGB14,
.type = MXC_ISI_VIDEO_CAP,
- .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
+ .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
.mem_planes = 1,
.color_planes = 1,
.depth = { 16 },
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread