* [PATCH 1/3] pinctrl: qcom: hawi: Fix intr_target_width
2026-09-17 9:03 [PATCH 0/3] Fix intr_target_width for modern SoCs Konrad Dybcio
@ 2026-09-17 9:03 ` Konrad Dybcio
2026-09-17 9:03 ` [PATCH 2/3] pinctrl: qcom: maili: " Konrad Dybcio
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2026-09-17 9:03 UTC (permalink / raw)
To: Bartosz Golaszewski, Bjorn Andersson, Linus Walleij, Mukesh Ojha,
Jingyi Wang, Dmitry Baryshkov, Shawn Guo, Pankaj Patil,
Maulik Shah, Jingyi Wang
Cc: linux-arm-msm, linux-gpio, linux-kernel, Bartosz Golaszewski,
Konrad Dybcio
The default width of the interrupt target field doesn't match the actual
register layout. Fix it.
Fixes: 90700e10d2ad ("pinctrl: qcom: Add Hawi pinctrl driver")
Assisted-by: LLM
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
drivers/pinctrl/qcom/pinctrl-hawi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-hawi.c b/drivers/pinctrl/qcom/pinctrl-hawi.c
index cdde69e954a76d7913f26ff33df21ea72349f74a..3486a6d63d10e71b0ad78f10b0a88bf6f47db738 100644
--- a/drivers/pinctrl/qcom/pinctrl-hawi.c
+++ b/drivers/pinctrl/qcom/pinctrl-hawi.c
@@ -47,6 +47,7 @@
.intr_wakeup_present_bit = 6, \
.intr_wakeup_enable_bit = 7, \
.intr_target_bit = 8, \
+ .intr_target_width = 4, \
.intr_target_kpss_val = 3, \
.intr_raw_status_bit = 4, \
.intr_polarity_bit = 1, \
--
2.55.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/3] pinctrl: qcom: maili: Fix intr_target_width
2026-09-17 9:03 [PATCH 0/3] Fix intr_target_width for modern SoCs Konrad Dybcio
2026-09-17 9:03 ` [PATCH 1/3] pinctrl: qcom: hawi: Fix intr_target_width Konrad Dybcio
@ 2026-09-17 9:03 ` Konrad Dybcio
2026-09-17 9:03 ` [PATCH 3/3] pinctrl: qcom: qcs8300: " Konrad Dybcio
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2026-09-17 9:03 UTC (permalink / raw)
To: Bartosz Golaszewski, Bjorn Andersson, Linus Walleij, Mukesh Ojha,
Jingyi Wang, Dmitry Baryshkov, Shawn Guo, Pankaj Patil,
Maulik Shah, Jingyi Wang
Cc: linux-arm-msm, linux-gpio, linux-kernel, Bartosz Golaszewski,
Konrad Dybcio
The default width of the interrupt target field doesn't match the actual
register layout. Fix it.
Fixes: 251b53103a2e ("pinctrl: qcom: Add the tlmm driver for Maili platform")
Assisted-by: LLM
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
drivers/pinctrl/qcom/pinctrl-maili.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-maili.c b/drivers/pinctrl/qcom/pinctrl-maili.c
index ffa084cfad6487ab6789000687ddbcc43b71bed5..b9ff0f4479410656cc73567ed494a1cfe25bb56b 100644
--- a/drivers/pinctrl/qcom/pinctrl-maili.c
+++ b/drivers/pinctrl/qcom/pinctrl-maili.c
@@ -47,6 +47,7 @@
.intr_wakeup_present_bit = 6, \
.intr_wakeup_enable_bit = 7, \
.intr_target_bit = 8, \
+ .intr_target_width = 4, \
.intr_target_kpss_val = 3, \
.intr_raw_status_bit = 4, \
.intr_polarity_bit = 1, \
--
2.55.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 3/3] pinctrl: qcom: qcs8300: Fix intr_target_width
2026-09-17 9:03 [PATCH 0/3] Fix intr_target_width for modern SoCs Konrad Dybcio
2026-09-17 9:03 ` [PATCH 1/3] pinctrl: qcom: hawi: Fix intr_target_width Konrad Dybcio
2026-09-17 9:03 ` [PATCH 2/3] pinctrl: qcom: maili: " Konrad Dybcio
@ 2026-09-17 9:03 ` Konrad Dybcio
2026-09-17 9:34 ` [PATCH 0/3] Fix intr_target_width for modern SoCs Shawn Guo
2026-09-17 9:49 ` Bartosz Golaszewski
4 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2026-09-17 9:03 UTC (permalink / raw)
To: Bartosz Golaszewski, Bjorn Andersson, Linus Walleij, Mukesh Ojha,
Jingyi Wang, Dmitry Baryshkov, Shawn Guo, Pankaj Patil,
Maulik Shah, Jingyi Wang
Cc: linux-arm-msm, linux-gpio, linux-kernel, Bartosz Golaszewski,
Konrad Dybcio
The default width of the interrupt target field doesn't match the actual
register layout. Fix it.
Fixes: 0c4cd2cc87c8 ("pinctrl: qcom: add the tlmm driver for QCS8300 platforms")
Assisted-by: LLM
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
drivers/pinctrl/qcom/pinctrl-qcs8300.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs8300.c b/drivers/pinctrl/qcom/pinctrl-qcs8300.c
index 9a904d809e11daa71b41fcb42b7c145017998673..fec86818c51188a0949e268382fb0c5de3f66f1a 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs8300.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs8300.c
@@ -45,6 +45,7 @@
.intr_enable_bit = 0, \
.intr_status_bit = 0, \
.intr_target_bit = 5, \
+ .intr_target_width = 4, \
.intr_target_kpss_val = 3, \
.intr_raw_status_bit = 4, \
.intr_polarity_bit = 1, \
--
2.55.0
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 0/3] Fix intr_target_width for modern SoCs
2026-09-17 9:03 [PATCH 0/3] Fix intr_target_width for modern SoCs Konrad Dybcio
` (2 preceding siblings ...)
2026-09-17 9:03 ` [PATCH 3/3] pinctrl: qcom: qcs8300: " Konrad Dybcio
@ 2026-09-17 9:34 ` Shawn Guo
2026-09-17 9:49 ` Bartosz Golaszewski
4 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2026-09-17 9:34 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bartosz Golaszewski, Bjorn Andersson, Linus Walleij, Mukesh Ojha,
Jingyi Wang, Dmitry Baryshkov, Pankaj Patil, Maulik Shah,
Jingyi Wang, linux-arm-msm, linux-gpio, linux-kernel,
Bartosz Golaszewski
On Thu, Sep 17, 2026 at 11:03:24AM +0200, Konrad Dybcio wrote:
> Following the Nord patch, I asked the robot to ensure the value is
> correct on all other SoCs and it found a couple outliers. This series
> fixes that up.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> Konrad Dybcio (3):
> pinctrl: qcom: hawi: Fix intr_target_width
> pinctrl: qcom: maili: Fix intr_target_width
> pinctrl: qcom: qcs8300: Fix intr_target_width
For the series:
Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 0/3] Fix intr_target_width for modern SoCs
2026-09-17 9:03 [PATCH 0/3] Fix intr_target_width for modern SoCs Konrad Dybcio
` (3 preceding siblings ...)
2026-09-17 9:34 ` [PATCH 0/3] Fix intr_target_width for modern SoCs Shawn Guo
@ 2026-09-17 9:49 ` Bartosz Golaszewski
4 siblings, 0 replies; 6+ messages in thread
From: Bartosz Golaszewski @ 2026-09-17 9:49 UTC (permalink / raw)
To: Bartosz Golaszewski, Bjorn Andersson, Linus Walleij, Mukesh Ojha,
Jingyi Wang, Dmitry Baryshkov, Shawn Guo, Pankaj Patil,
Maulik Shah, Jingyi Wang, Konrad Dybcio
Cc: Bartosz Golaszewski, linux-arm-msm, linux-gpio, linux-kernel
On Thu, 17 Sep 2026 11:03:24 +0200, Konrad Dybcio wrote:
> Following the Nord patch, I asked the robot to ensure the value is
> correct on all other SoCs and it found a couple outliers. This series
> fixes that up.
>
>
Applied, thanks!
[1/3] pinctrl: qcom: hawi: Fix intr_target_width
https://git.kernel.org/brgl/c/9d4c3e0c6a53eb390d58b8d7aaf08885e46f93fd
[2/3] pinctrl: qcom: maili: Fix intr_target_width
https://git.kernel.org/brgl/c/912df33f296e6c4ced8c0a5e7998d570a0b82214
[3/3] pinctrl: qcom: qcs8300: Fix intr_target_width
https://git.kernel.org/brgl/c/dcb5df182b37587d5ad6bb4388751bf5180957ac
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread