[GIT PULL] clk: zte: zx297520v3 clock bindings and driver

[GIT PULL] clk: zte: zx297520v3 clock bindings and driver

[Stefan Dösinger]

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Hi,

This pull request contains the device tree bindings and clock driver for ZTE
zx297520v3 boards. It contains the next step in adding support for
zx297520v3 boards: Documenting clock and reset manager hardware and
adding drivers for its PLLs and clock tree.

The patches have been reviewed and carry appropriate R-B tags by Krzysztof Kozlowski (bindings) and Conor Dooley (clk driver).

The PR does not contain the MFD, reset and device tree patches. They
will be submitted to the MFD, reset and soc trees respectively. The
clock driver compiles without them, but won't be instantiated without
the MFD parent.

The following changes since commit b1470947e92aeedd522ddb7363369c956e55d6b6:

  Merge branch 'clk-pile' into clk-next (2026-09-29 14:14:32 -0400)

are available in the Git repository at:

  https://gitlab.com/stefandoesinger/zx297520-kernel.git tags/zx29-clk-for-7.4

for you to fetch changes up to 89e2c0fa481f6a0da23ad5c4dc98bcd940f09fd2:

  clk: zte: Introduce a driver for zx297520v3 LSP clocks (2026-09-30 20:03:29 +0300)

----------------------------------------------------------------
clk: zte: Add clock drivers for zx297520v3 SoC

This tag contains the device tree bindings and clock driver for ZTE
zx297520v3 boards. It contains the next step in adding support for
zx297520v3 boards: Documenting clock and reset manager hardware and
adding drivers for its PLLs and clock tree.

The PR does not contain the MFD, reset and device tree patches. They
will be submitted to the MFD, reset and soc trees respectively. The
clock driver compiles without them, but won't be instantiated without
the MFD parent.

----------------------------------------------------------------
Stefan Dösinger (9):
      dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller
      dt-bindings: clk: zte: Add zx297520v3 matrix clock and reset controller
      dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller
      clk: zte: Add Clock registration infrastructure
      clk: zte: Add regmap-based clocks
      clk: zte: Add zx PLL support infrastructure
      clk: zte: Introduce a driver for zx297520v3 top clocks
      clk: zte: Introduce a driver for zx297520v3 matrix clocks
      clk: zte: Introduce a driver for zx297520v3 LSP clocks

 Documentation/devicetree/bindings/clock/zte,zx297520v3-lspcrm.yaml    |  101 ++
 Documentation/devicetree/bindings/clock/zte,zx297520v3-matrixcrm.yaml |   98 ++
 Documentation/devicetree/bindings/clock/zte,zx297520v3-topcrm.yaml    |  122 +++
 MAINTAINERS                                                           |    7 +
 drivers/clk/Kconfig                                                   |    1 +
 drivers/clk/Makefile                                                  |    1 +
 drivers/clk/zte/Kconfig                                               |   28 +
 drivers/clk/zte/Makefile                                              |    6 +
 drivers/clk/zte/clk-regmap.c                                          |  237 +++++
 drivers/clk/zte/clk-zx.c                                              |  192 ++++
 drivers/clk/zte/clk-zx.h                                              |  137 +++
 drivers/clk/zte/clk-zx297520v3.c                                      | 1657 +++++++++++++++++++++++++++++++++
 drivers/clk/zte/pll-zx.c                                              |  576 ++++++++++++
 include/dt-bindings/clock/zte,zx297520v3-clk.h                        |  154 +++
 include/dt-bindings/phy/zte,zx297520v3-topcrm.h                       |   12 +
 include/dt-bindings/reset/zte,zx297520v3-reset.h                      |   62 ++
 16 files changed, 3391 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-lspcrm.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-matrixcrm.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-topcrm.yaml
 create mode 100644 drivers/clk/zte/Kconfig
 create mode 100644 drivers/clk/zte/Makefile
 create mode 100644 drivers/clk/zte/clk-regmap.c
 create mode 100644 drivers/clk/zte/clk-zx.c
 create mode 100644 drivers/clk/zte/clk-zx.h
 create mode 100644 drivers/clk/zte/clk-zx297520v3.c
 create mode 100644 drivers/clk/zte/pll-zx.c
 create mode 100644 include/dt-bindings/clock/zte,zx297520v3-clk.h
 create mode 100644 include/dt-bindings/phy/zte,zx297520v3-topcrm.h
 create mode 100644 include/dt-bindings/reset/zte,zx297520v3-reset.h

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Re: [GIT PULL] clk: zte: zx297520v3 clock bindings and driver

[Stefan Dösinger]

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Am Mittwoch, 30. September 2026, 21:40:12 Ostafrikanische Zeit schrieb Stefan 
Dösinger:
> Hi,
> 
> This pull request contains the device tree bindings and clock driver for ZTE
> zx297520v3 boards. It contains the next step in adding support for
> zx297520v3 boards: Documenting clock and reset manager hardware and adding
> drivers for its PLLs and clock tree.
> 
> The patches have been reviewed and carry appropriate R-B tags by Krzysztof
> Kozlowski (bindings) and Conor Dooley (clk driver).

My apologies for the name confusion: The clk part has been reviewed by Brian 
Masney of course, not Conor Dooley.

Best regards,
Stefan

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Re: [GIT PULL] clk: zte: zx297520v3 clock bindings and driver

[Brian Masney]

Hi Stefan,

On Wed, Sep 30, 2026 at 09:40:12PM +0300, Stefan Dösinger wrote:
> Hi,
> 
> This pull request contains the device tree bindings and clock driver for ZTE
> zx297520v3 boards. It contains the next step in adding support for
> zx297520v3 boards: Documenting clock and reset manager hardware and
> adding drivers for its PLLs and clock tree.
> 
> The patches have been reviewed and carry appropriate R-B tags by Krzysztof Kozlowski (bindings) and Conor Dooley (clk driver).
> 
> The PR does not contain the MFD, reset and device tree patches. They
> will be submitted to the MFD, reset and soc trees respectively. The
> clock driver compiles without them, but won't be instantiated without
> the MFD parent.
> 
> The following changes since commit b1470947e92aeedd522ddb7363369c956e55d6b6:
> 
>   Merge branch 'clk-pile' into clk-next (2026-09-29 14:14:32 -0400)

Please send a new pull that's based on v7.3-rc1. Or if it's easier you
can post a new version of the patch series with just these clk patches.

Brian


> 
> are available in the Git repository at:
> 
>   https://gitlab.com/stefandoesinger/zx297520-kernel.git tags/zx29-clk-for-7.4
> 
> for you to fetch changes up to 89e2c0fa481f6a0da23ad5c4dc98bcd940f09fd2:
> 
>   clk: zte: Introduce a driver for zx297520v3 LSP clocks (2026-09-30 20:03:29 +0300)
> 
> ----------------------------------------------------------------
> clk: zte: Add clock drivers for zx297520v3 SoC
> 
> This tag contains the device tree bindings and clock driver for ZTE
> zx297520v3 boards. It contains the next step in adding support for
> zx297520v3 boards: Documenting clock and reset manager hardware and
> adding drivers for its PLLs and clock tree.
> 
> The PR does not contain the MFD, reset and device tree patches. They
> will be submitted to the MFD, reset and soc trees respectively. The
> clock driver compiles without them, but won't be instantiated without
> the MFD parent.
> 
> ----------------------------------------------------------------
> Stefan Dösinger (9):
>       dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller
>       dt-bindings: clk: zte: Add zx297520v3 matrix clock and reset controller
>       dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller
>       clk: zte: Add Clock registration infrastructure
>       clk: zte: Add regmap-based clocks
>       clk: zte: Add zx PLL support infrastructure
>       clk: zte: Introduce a driver for zx297520v3 top clocks
>       clk: zte: Introduce a driver for zx297520v3 matrix clocks
>       clk: zte: Introduce a driver for zx297520v3 LSP clocks
> 
>  Documentation/devicetree/bindings/clock/zte,zx297520v3-lspcrm.yaml    |  101 ++
>  Documentation/devicetree/bindings/clock/zte,zx297520v3-matrixcrm.yaml |   98 ++
>  Documentation/devicetree/bindings/clock/zte,zx297520v3-topcrm.yaml    |  122 +++
>  MAINTAINERS                                                           |    7 +
>  drivers/clk/Kconfig                                                   |    1 +
>  drivers/clk/Makefile                                                  |    1 +
>  drivers/clk/zte/Kconfig                                               |   28 +
>  drivers/clk/zte/Makefile                                              |    6 +
>  drivers/clk/zte/clk-regmap.c                                          |  237 +++++
>  drivers/clk/zte/clk-zx.c                                              |  192 ++++
>  drivers/clk/zte/clk-zx.h                                              |  137 +++
>  drivers/clk/zte/clk-zx297520v3.c                                      | 1657 +++++++++++++++++++++++++++++++++
>  drivers/clk/zte/pll-zx.c                                              |  576 ++++++++++++
>  include/dt-bindings/clock/zte,zx297520v3-clk.h                        |  154 +++
>  include/dt-bindings/phy/zte,zx297520v3-topcrm.h                       |   12 +
>  include/dt-bindings/reset/zte,zx297520v3-reset.h                      |   62 ++
>  16 files changed, 3391 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-lspcrm.yaml
>  create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-matrixcrm.yaml
>  create mode 100644 Documentation/devicetree/bindings/clock/zte,zx297520v3-topcrm.yaml
>  create mode 100644 drivers/clk/zte/Kconfig
>  create mode 100644 drivers/clk/zte/Makefile
>  create mode 100644 drivers/clk/zte/clk-regmap.c
>  create mode 100644 drivers/clk/zte/clk-zx.c
>  create mode 100644 drivers/clk/zte/clk-zx.h
>  create mode 100644 drivers/clk/zte/clk-zx297520v3.c
>  create mode 100644 drivers/clk/zte/pll-zx.c
>  create mode 100644 include/dt-bindings/clock/zte,zx297520v3-clk.h
>  create mode 100644 include/dt-bindings/phy/zte,zx297520v3-topcrm.h
>  create mode 100644 include/dt-bindings/reset/zte,zx297520v3-reset.h