From: Will Deacon <will@kernel.org>
To: Beata Michalska <beata.michalska@arm.com>, Vladimir.Murzin@arm.com
Cc: suzuki.poulose@arm.com, James.Morse@arm.com,
xuewen.yan94@gmail.com, seanwang1@lenovo.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 0/2] arm64: errata: Share broken AMU constant-counter handling
Date: Thu, 1 Oct 2026 12:42:50 +0100 [thread overview]
Message-ID: <ar5HOl4JL0G2yZfE@willie-the-truck> (raw)
In-Reply-To: <20261001090050.3849551-1-beata.michalska@arm.com>
On Thu, Oct 01, 2026 at 11:00:30AM +0200, Beata Michalska wrote:
> This series factors out the existing Cortex-A510 erratum 2457168 AMU constant
> counter workaround into a generic broken AMU constant-counter capability,
> then wires Cortex-A725 erratum 3821522 into the same handling.
Thanks, Beata. These look good to me now and I'd like to include them
in the next batch of arm64 fixes, but I'll give Vladimir a chance to
have another look first...
Will
next prev parent reply other threads:[~2026-10-01 11:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 9:00 Beata Michalska
2026-10-01 9:00 ` [PATCH v4 1/2] arm64: errata: Factor out broken AMU const counter cap Beata Michalska
2026-10-01 12:10 ` Vladimir Murzin
2026-10-01 9:00 ` [PATCH v4 2/2] arm64: errata: Add Cortex-A725 erratum 3821522 workaround Beata Michalska
2026-10-01 12:12 ` Vladimir Murzin
2026-10-01 11:42 ` Will Deacon [this message]
2026-10-01 12:14 ` [PATCH v4 0/2] arm64: errata: Share broken AMU constant-counter handling Vladimir Murzin
2026-10-01 15:50 ` Will Deacon
2026-10-27 6:40 ` Xuewen Yan
2026-11-03 12:55 ` Beata Michalska
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