* [PATCH V3 1/2] arm64/mm: Move __check_safe_pte_update()
2026-09-16 4:49 [PATCH V3 0/2] arm64/mm: Standardize printing for pgtable entries Anshuman Khandual
@ 2026-09-16 4:49 ` Anshuman Khandual
2026-09-16 4:49 ` [PATCH V3 2/2] arm64/mm: Standardize printing for pgtable entries Anshuman Khandual
2026-09-24 10:19 ` [PATCH V3 0/2] " Catalin Marinas
2 siblings, 0 replies; 4+ messages in thread
From: Anshuman Khandual @ 2026-09-16 4:49 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Anshuman Khandual, David Hildenbrand, Mike Rapoport,
Andrew Morton, Lorenzo Stoakes, Catalin Marinas, Will Deacon,
linux-kernel, linux-mm
The page table entry print helpers and related macros which are defined in
<linux/pgtable.h> will not be accessible in platform <asm/pgtable.h> which
is basically caused by cycling dependency.
Move __check_safe_pte_update() inside arch/arm64/mm/mmu.c as a preparation
for subsequent usage of the afore mentioned generic MM helpers. While here
drop IS_ENABLED(CONFIG_DEBUG_VM), although wrap __check_safe_pte_update()
inside #ifdef CONFIG_DEBUG_VM that preserves the current code optimization
which is achieved via the static inline functions.
This does not cause any functional change.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: David Hildenbrand (Arm) <david@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
arch/arm64/include/asm/pgtable.h | 49 ++++----------------------------
arch/arm64/mm/mmu.c | 44 ++++++++++++++++++++++++++++
2 files changed, 49 insertions(+), 44 deletions(-)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index e89ec5f4787b..763c5a411d64 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -387,52 +387,13 @@ static inline pte_t __ptep_get(pte_t *ptep)
extern void __sync_icache_dcache(pte_t pteval);
bool pgattr_change_is_safe(pteval_t old, pteval_t new);
-/*
- * PTE bits configuration in the presence of hardware Dirty Bit Management
- * (PTE_WRITE == PTE_DBM):
- *
- * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
- * 0 0 | 1 0 0
- * 0 1 | 1 1 0
- * 1 0 | 1 0 1
- * 1 1 | 0 1 x
- *
- * When hardware DBM is not present, the software PTE_DIRTY bit is updated via
- * the page fault mechanism. Checking the dirty status of a pte becomes:
- *
- * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
- */
-
-static inline void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep,
- pte_t pte)
+#ifdef CONFIG_DEBUG_VM
+void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte);
+#else
+static inline void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte)
{
- pte_t old_pte;
-
- if (!IS_ENABLED(CONFIG_DEBUG_VM))
- return;
-
- old_pte = __ptep_get(ptep);
-
- if (!pte_valid(old_pte) || !pte_valid(pte))
- return;
- if (mm != current->active_mm && atomic_read(&mm->mm_users) <= 1)
- return;
-
- /*
- * Check for potential race with hardware updates of the pte
- * (__ptep_set_access_flags safely changes valid ptes without going
- * through an invalid entry).
- */
- VM_WARN_ONCE(!pte_young(pte),
- "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
- VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
- "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
- VM_WARN_ONCE(!pgattr_change_is_safe(pte_val(old_pte), pte_val(pte)),
- "%s: unsafe attribute change: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
}
+#endif /* CONFIG_DEBUG_VM */
static inline void __sync_cache_and_tags(pte_t pte, unsigned int nr_pages)
{
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 79d90226fd5d..cb49469707a8 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -2392,4 +2392,48 @@ int arch_set_user_pkey_access(int pkey, unsigned long init_val)
return 0;
}
+
+/*
+ * PTE bits configuration in the presence of hardware Dirty Bit Management
+ * (PTE_WRITE == PTE_DBM):
+ *
+ * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
+ * 0 0 | 1 0 0
+ * 0 1 | 1 1 0
+ * 1 0 | 1 0 1
+ * 1 1 | 0 1 x
+ *
+ * When hardware DBM is not present, the software PTE_DIRTY bit is updated via
+ * the page fault mechanism. Checking the dirty status of a pte becomes:
+ *
+ * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
+ */
+#ifdef CONFIG_DEBUG_VM
+void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte)
+{
+ pte_t old_pte;
+
+ old_pte = __ptep_get(ptep);
+
+ if (!pte_valid(old_pte) || !pte_valid(pte))
+ return;
+ if (mm != current->active_mm && atomic_read(&mm->mm_users) <= 1)
+ return;
+
+ /*
+ * Check for potential race with hardware updates of the pte
+ * (__ptep_set_access_flags safely changes valid ptes without going
+ * through an invalid entry).
+ */
+ VM_WARN_ONCE(!pte_young(pte),
+ "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
+ __func__, pte_val(old_pte), pte_val(pte));
+ VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
+ "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
+ __func__, pte_val(old_pte), pte_val(pte));
+ VM_WARN_ONCE(!pgattr_change_is_safe(pte_val(old_pte), pte_val(pte)),
+ "%s: unsafe attribute change: 0x%016llx -> 0x%016llx",
+ __func__, pte_val(old_pte), pte_val(pte));
+}
+#endif /* CONFIG_DEBUG_VM */
#endif
--
2.43.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH V3 2/2] arm64/mm: Standardize printing for pgtable entries
2026-09-16 4:49 [PATCH V3 0/2] arm64/mm: Standardize printing for pgtable entries Anshuman Khandual
2026-09-16 4:49 ` [PATCH V3 1/2] arm64/mm: Move __check_safe_pte_update() Anshuman Khandual
@ 2026-09-16 4:49 ` Anshuman Khandual
2026-09-24 10:19 ` [PATCH V3 0/2] " Catalin Marinas
2 siblings, 0 replies; 4+ messages in thread
From: Anshuman Khandual @ 2026-09-16 4:49 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Anshuman Khandual, David Hildenbrand, Mike Rapoport,
Andrew Morton, Lorenzo Stoakes, Catalin Marinas, Will Deacon,
linux-kernel, linux-mm
Standardize printing for pgtable entries using recently introduced generic
helper ptval_bytes_to_hex_str() in core MM which automatically enables 128
bits entries when added later.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: David Hildenbrand (Arm) <david@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
arch/arm64/mm/fault.c | 16 +++++++++++-----
arch/arm64/mm/mmu.c | 16 ++++++++++------
2 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 75c3e463df2e..2cecf6ba6df7 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -131,6 +131,7 @@ static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
*/
static void show_pte(unsigned long addr)
{
+ char pxd_str[PTVAL_STR_MAX];
struct mm_struct *mm;
pgd_t *pgdp;
pgd_t pgd;
@@ -160,7 +161,8 @@ static void show_pte(unsigned long addr)
pgdp = pgd_offset(mm, addr);
pgd = READ_ONCE(*pgdp);
- pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
+ ptval_to_str(pxd_str, pgd_val(pgd));
+ pr_alert("[%016lx] pgd=%s", addr, pxd_str);
do {
p4d_t *p4dp, p4d;
@@ -173,19 +175,22 @@ static void show_pte(unsigned long addr)
p4dp = p4d_offset_lockless(pgdp, pgd, addr);
p4d = READ_ONCE(*p4dp);
- pr_cont(", p4d=%016llx", p4d_val(p4d));
+ ptval_to_str(pxd_str, p4d_val(p4d));
+ pr_cont(", p4d=%s", pxd_str);
if (p4d_none(p4d) || p4d_bad(p4d))
break;
pudp = pud_offset_lockless(p4dp, p4d, addr);
pud = READ_ONCE(*pudp);
- pr_cont(", pud=%016llx", pud_val(pud));
+ ptval_to_str(pxd_str, pud_val(pud));
+ pr_cont(", pud=%s", pxd_str);
if (pud_none(pud) || pud_bad(pud))
break;
pmdp = pmd_offset_lockless(pudp, pud, addr);
pmd = READ_ONCE(*pmdp);
- pr_cont(", pmd=%016llx", pmd_val(pmd));
+ ptval_to_str(pxd_str, pmd_val(pmd));
+ pr_cont(", pmd=%s", pxd_str);
if (pmd_none(pmd) || pmd_bad(pmd))
break;
@@ -194,7 +199,8 @@ static void show_pte(unsigned long addr)
break;
pte = __ptep_get(ptep);
- pr_cont(", pte=%016llx", pte_val(pte));
+ ptval_to_str(pxd_str, pte_val(pte));
+ pr_cont(", pte=%s", pxd_str);
pte_unmap(ptep);
} while(0);
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index cb49469707a8..e589fb00d1e3 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -2411,6 +2411,8 @@ int arch_set_user_pkey_access(int pkey, unsigned long init_val)
#ifdef CONFIG_DEBUG_VM
void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte)
{
+ char pte_str_old[PTVAL_STR_MAX];
+ char pte_str[PTVAL_STR_MAX];
pte_t old_pte;
old_pte = __ptep_get(ptep);
@@ -2425,15 +2427,17 @@ void __check_safe_pte_update(struct mm_struct *mm, pte_t *ptep, pte_t pte)
* (__ptep_set_access_flags safely changes valid ptes without going
* through an invalid entry).
*/
+ ptval_to_str(pte_str, pte_val(pte));
+ ptval_to_str(pte_str_old, pte_val(old_pte));
VM_WARN_ONCE(!pte_young(pte),
- "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
+ "%s: racy access flag clearing: %s -> %s",
+ __func__, pte_str_old, pte_str);
VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
- "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
+ "%s: racy dirty state clearing: %s -> %s",
+ __func__, pte_str_old, pte_str);
VM_WARN_ONCE(!pgattr_change_is_safe(pte_val(old_pte), pte_val(pte)),
- "%s: unsafe attribute change: 0x%016llx -> 0x%016llx",
- __func__, pte_val(old_pte), pte_val(pte));
+ "%s: unsafe attribute change: %s -> %s",
+ __func__, pte_str_old, pte_str);
}
#endif /* CONFIG_DEBUG_VM */
#endif
--
2.43.0
^ permalink raw reply [flat|nested] 4+ messages in thread