* [PATCH v2 1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional
2026-10-02 16:28 [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors Junhui Liu
@ 2026-10-02 16:28 ` Junhui Liu
2026-10-02 16:32 ` Conor Dooley
2026-10-02 16:28 ` [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks Junhui Liu
2026-10-02 19:10 ` (subset) [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors Brian Masney
2 siblings, 1 reply; 7+ messages in thread
From: Junhui Liu @ 2026-10-02 16:28 UTC (permalink / raw)
To: Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti
Cc: Brian Masney, Conor Dooley, Yixun Lan, linux-clk, devicetree,
linux-kernel, linux-riscv, Junhui Liu
The main oscillator is the only required input clock for the CRU, while
the external CAN and WDT clocks are optional board-level inputs. The
binding currently requires all three clocks, forcing device trees for
boards without these external inputs to add stub fixed-clock nodes for
which no meaningful clock-frequency can be specified.
Allow the clocks and clock-names properties to contain just "osc",
optionally followed by either or both of "can_ext" and "wdt_ext".
Fixes: 155d900e4c7d ("dt-bindings: clock: add Anlogic DR1V90 CRU")
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
.../devicetree/bindings/clock/anlogic,dr1v90-cru.yaml | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/anlogic,dr1v90-cru.yaml b/Documentation/devicetree/bindings/clock/anlogic,dr1v90-cru.yaml
index 11a92588e494..482640bcf644 100644
--- a/Documentation/devicetree/bindings/clock/anlogic,dr1v90-cru.yaml
+++ b/Documentation/devicetree/bindings/clock/anlogic,dr1v90-cru.yaml
@@ -17,15 +17,17 @@ properties:
maxItems: 1
clocks:
- items:
- - description: Main oscillator
- - description: External CAN clock
- - description: External WDT clock
+ minItems: 1
+ maxItems: 3
+ description:
+ The main oscillator is always required. Either or both of the external CAN
+ and WDT clocks may also be provided if the board routes them to the SoC.
clock-names:
+ minItems: 1
items:
- const: osc
- - const: can_ext
+ - enum: [can_ext, wdt_ext]
- const: wdt_ext
"#clock-cells":
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional
2026-10-02 16:28 ` [PATCH v2 1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional Junhui Liu
@ 2026-10-02 16:32 ` Conor Dooley
0 siblings, 0 replies; 7+ messages in thread
From: Conor Dooley @ 2026-10-02 16:32 UTC (permalink / raw)
To: Junhui Liu
Cc: Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Brian Masney, Conor Dooley,
Yixun Lan, linux-clk, devicetree, linux-kernel, linux-riscv
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks
2026-10-02 16:28 [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors Junhui Liu
2026-10-02 16:28 ` [PATCH v2 1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional Junhui Liu
@ 2026-10-02 16:28 ` Junhui Liu
2026-10-02 16:33 ` Conor Dooley
2026-10-02 19:10 ` (subset) [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors Brian Masney
2 siblings, 1 reply; 7+ messages in thread
From: Junhui Liu @ 2026-10-02 16:28 UTC (permalink / raw)
To: Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti
Cc: Brian Masney, Conor Dooley, Yixun Lan, linux-clk, devicetree,
linux-kernel, linux-riscv, Junhui Liu
The external CAN and watchdog clock inputs are not routed on the MLKPAI
FS01, the only board currently supported. Drop the two fixed-clock
placeholders from the common dtsi, as fixed clocks require a valid
clock-frequency property.
Both clock muxes select their internal parent clocks after reset, so
the CRU operates correctly without the external inputs. Keep only the
required oscillator input to the CRU.
A board using these external clocks should define them in its own
board-level dts and override the clocks and clock-names properties of
the CRU node.
Reported-by: Yixun Lan <dlan@kernel.org>
Fixes: 7849521aaac2 ("riscv: dts: anlogic: add clocks and CRU for DR1V90")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
arch/riscv/boot/dts/anlogic/dr1v90.dtsi | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
index 574c6608aef0..fe85d01563ad 100644
--- a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
+++ b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
@@ -44,23 +44,11 @@ cpu0_intc: interrupt-controller {
};
clocks {
- can_ext: clock-ext-can {
- compatible = "fixed-clock";
- clock-output-names = "can_ext";
- #clock-cells = <0>;
- };
-
osc: clock-osc {
compatible = "fixed-clock";
clock-output-names = "osc";
#clock-cells = <0>;
};
-
- wdt_ext: clock-ext-wdt {
- compatible = "fixed-clock";
- clock-output-names = "wdt_ext";
- #clock-cells = <0>;
- };
};
soc {
@@ -128,8 +116,8 @@ uart1: serial@f8401000 {
cru: clock-controller@f8801000 {
compatible = "anlogic,dr1v90-cru";
reg = <0x0 0xf8801000 0 0x400>;
- clocks = <&osc>, <&can_ext>, <&wdt_ext>;
- clock-names = "osc", "can_ext", "wdt_ext";
+ clocks = <&osc>;
+ clock-names = "osc";
#clock-cells = <1>;
#reset-cells = <1>;
};
--
2.55.0
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks
2026-10-02 16:28 ` [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks Junhui Liu
@ 2026-10-02 16:33 ` Conor Dooley
2026-10-02 17:57 ` Brian Masney
0 siblings, 1 reply; 7+ messages in thread
From: Conor Dooley @ 2026-10-02 16:33 UTC (permalink / raw)
To: Junhui Liu
Cc: Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Brian Masney, Conor Dooley,
Yixun Lan, linux-clk, devicetree, linux-kernel, linux-riscv
[-- Attachment #1: Type: text/plain, Size: 2376 bytes --]
On Sat, Oct 03, 2026 at 12:28:40AM +0800, Junhui Liu wrote:
> The external CAN and watchdog clock inputs are not routed on the MLKPAI
> FS01, the only board currently supported. Drop the two fixed-clock
> placeholders from the common dtsi, as fixed clocks require a valid
> clock-frequency property.
>
> Both clock muxes select their internal parent clocks after reset, so
> the CRU operates correctly without the external inputs. Keep only the
> required oscillator input to the CRU.
>
> A board using these external clocks should define them in its own
> board-level dts and override the clocks and clock-names properties of
> the CRU node.
>
> Reported-by: Yixun Lan <dlan@kernel.org>
> Fixes: 7849521aaac2 ("riscv: dts: anlogic: add clocks and CRU for DR1V90")
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Per the v1, Brian said he would rebase the clock tree, so I'll just
squash this into the original patch I think.
> ---
> arch/riscv/boot/dts/anlogic/dr1v90.dtsi | 16 ++--------------
> 1 file changed, 2 insertions(+), 14 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
> index 574c6608aef0..fe85d01563ad 100644
> --- a/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
> +++ b/arch/riscv/boot/dts/anlogic/dr1v90.dtsi
> @@ -44,23 +44,11 @@ cpu0_intc: interrupt-controller {
> };
>
> clocks {
> - can_ext: clock-ext-can {
> - compatible = "fixed-clock";
> - clock-output-names = "can_ext";
> - #clock-cells = <0>;
> - };
> -
> osc: clock-osc {
> compatible = "fixed-clock";
> clock-output-names = "osc";
> #clock-cells = <0>;
> };
> -
> - wdt_ext: clock-ext-wdt {
> - compatible = "fixed-clock";
> - clock-output-names = "wdt_ext";
> - #clock-cells = <0>;
> - };
> };
>
> soc {
> @@ -128,8 +116,8 @@ uart1: serial@f8401000 {
> cru: clock-controller@f8801000 {
> compatible = "anlogic,dr1v90-cru";
> reg = <0x0 0xf8801000 0 0x400>;
> - clocks = <&osc>, <&can_ext>, <&wdt_ext>;
> - clock-names = "osc", "can_ext", "wdt_ext";
> + clocks = <&osc>;
> + clock-names = "osc";
> #clock-cells = <1>;
> #reset-cells = <1>;
> };
>
> --
> 2.55.0
>
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks
2026-10-02 16:33 ` Conor Dooley
@ 2026-10-02 17:57 ` Brian Masney
0 siblings, 0 replies; 7+ messages in thread
From: Brian Masney @ 2026-10-02 17:57 UTC (permalink / raw)
To: Conor Dooley
Cc: Junhui Liu, Stephen Boyd, Brian Masney, Jerome Brunet,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Conor Dooley,
Yixun Lan, linux-clk, devicetree, linux-kernel, linux-riscv
On Fri, Oct 02, 2026 at 05:33:24PM +0100, Conor Dooley wrote:
> On Sat, Oct 03, 2026 at 12:28:40AM +0800, Junhui Liu wrote:
> > The external CAN and watchdog clock inputs are not routed on the MLKPAI
> > FS01, the only board currently supported. Drop the two fixed-clock
> > placeholders from the common dtsi, as fixed clocks require a valid
> > clock-frequency property.
> >
> > Both clock muxes select their internal parent clocks after reset, so
> > the CRU operates correctly without the external inputs. Keep only the
> > required oscillator input to the CRU.
> >
> > A board using these external clocks should define them in its own
> > board-level dts and override the clocks and clock-names properties of
> > the CRU node.
> >
> > Reported-by: Yixun Lan <dlan@kernel.org>
> > Fixes: 7849521aaac2 ("riscv: dts: anlogic: add clocks and CRU for DR1V90")
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
>
> Per the v1, Brian said he would rebase the clock tree, so I'll just
> squash this into the original patch I think.
It's already rebased, and dropped from the clk-next history.
Brian
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: (subset) [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors
2026-10-02 16:28 [PATCH v2 0/2] riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors Junhui Liu
2026-10-02 16:28 ` [PATCH v2 1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional Junhui Liu
2026-10-02 16:28 ` [PATCH v2 2/2] riscv: dts: anlogic: drop unused DR1V90 external clocks Junhui Liu
@ 2026-10-02 19:10 ` Brian Masney
2 siblings, 0 replies; 7+ messages in thread
From: Brian Masney @ 2026-10-02 19:10 UTC (permalink / raw)
To: Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Junhui Liu
Cc: Conor Dooley, Yixun Lan, linux-clk, devicetree, linux-kernel,
linux-riscv
On Sat, 03 Oct 2026 00:28:38 +0800, Junhui Liu wrote:
> riscv: dts: anlogic: dr1v90: fix clock dtbs_check errors
>
> The external CAN and watchdog clocks are optional board-level inputs to
> the DR1V90 CRU. The current binding requires both inputs, causing the
> common SoC device tree to provide fixed-clock placeholders without the
> required clock-frequency property. Consequently, dtbs_check reports:
>
> [...]
Applied, thanks!
[1/2] dt-bindings: clock: anlogic,dr1v90-cru: make external clocks optional
commit: ca4983a301063d9cf8d0ef556883f90a94a0bd32
Best regards,
--
Brian Masney <bmasney@redhat.com>
^ permalink raw reply [flat|nested] 7+ messages in thread