* [PATCH v2] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
@ 2026-09-23 3:59 Ekansh Gupta
2026-09-25 18:16 ` Bjorn Andersson
0 siblings, 1 reply; 2+ messages in thread
From: Ekansh Gupta @ 2026-09-23 3:59 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sibi Sankar
Cc: Bharath Kumar, Chenna Kesava Raju, Konrad Dybcio, linux-arm-msm,
devicetree, linux-kernel, Mahima Bhattaram, Pankaj Patil,
Abel Vesa, Ekansh Gupta
The reg value of a compute-cb node must match the SID (the lower
nibble of its IOMMU stream ID) it is associated with. In the cdsp
fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
14, which don't match their SIDs and leads to SMMU translation errors.
Fix the reg values, and rename the nodes accordingly.
Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
Reviewed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
---
Changes in v2:
- Change unit adress to hex.
- Link to v1: https://lore.kernel.org/r/20260922-glymur-dtfix-v1-1-159da6b0eed9@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index de7c395d9c35..3219603372ce 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -8471,9 +8471,9 @@ compute-cb@8 {
/* note: compute-cb@9 is secure */
- compute-cb@10 {
+ compute-cb@c {
compatible = "qcom,fastrpc-compute-cb";
- reg = <10>;
+ reg = <12>;
iommus = <&apps_smmu 0x240c 0x440>,
<&apps_smmu 0x196c 0x0>,
@@ -8481,9 +8481,9 @@ compute-cb@10 {
dma-coherent;
};
- compute-cb@11 {
+ compute-cb@d {
compatible = "qcom,fastrpc-compute-cb";
- reg = <11>;
+ reg = <13>;
iommus = <&apps_smmu 0x240d 0x440>,
<&apps_smmu 0x196d 0x0>,
@@ -8491,9 +8491,9 @@ compute-cb@11 {
dma-coherent;
};
- compute-cb@12 {
+ compute-cb@e {
compatible = "qcom,fastrpc-compute-cb";
- reg = <12>;
+ reg = <14>;
iommus = <&apps_smmu 0x240e 0x440>,
<&apps_smmu 0x196e 0x0>,
---
base-commit: 5c4d4169604b335c38bbc79bc1fc03042981fc6f
change-id: 20260922-glymur-dtfix-6314526b4b02
Best regards,
--
Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
2026-09-23 3:59 [PATCH v2] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp Ekansh Gupta
@ 2026-09-25 18:16 ` Bjorn Andersson
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Andersson @ 2026-09-25 18:16 UTC (permalink / raw)
To: Ekansh Gupta
Cc: Konrad Dybcio, Abel Vesa, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sibi Sankar, Bharath Kumar, Chenna Kesava Raju,
Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel,
Mahima Bhattaram, Pankaj Patil, Abel Vesa
On Wed, Sep 23, 2026 at 09:29:39AM +0530, Ekansh Gupta wrote:
> The reg value of a compute-cb node must match the SID (the lower
> nibble of its IOMMU stream ID) it is associated with. In the cdsp
> fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
> mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
> 14, which don't match their SIDs and leads to SMMU translation errors.
> Fix the reg values, and rename the nodes accordingly.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Reviewed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
> ---
> Changes in v2:
> - Change unit adress to hex.
> - Link to v1: https://lore.kernel.org/r/20260922-glymur-dtfix-v1-1-159da6b0eed9@oss.qualcomm.com
> ---
> arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index de7c395d9c35..3219603372ce 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -8471,9 +8471,9 @@ compute-cb@8 {
>
> /* note: compute-cb@9 is secure */
>
> - compute-cb@10 {
> + compute-cb@c {
This looks better, but it's not allowed by the fastrpc binding. Please
resubmit this together with adequate dt-binding updates; and please run
dtbs_check when you're patching DeviceTree files.
Thanks,
Bjorn
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <10>;
> + reg = <12>;
>
> iommus = <&apps_smmu 0x240c 0x440>,
> <&apps_smmu 0x196c 0x0>,
> @@ -8481,9 +8481,9 @@ compute-cb@10 {
> dma-coherent;
> };
>
> - compute-cb@11 {
> + compute-cb@d {
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <11>;
> + reg = <13>;
>
> iommus = <&apps_smmu 0x240d 0x440>,
> <&apps_smmu 0x196d 0x0>,
> @@ -8491,9 +8491,9 @@ compute-cb@11 {
> dma-coherent;
> };
>
> - compute-cb@12 {
> + compute-cb@e {
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <12>;
> + reg = <14>;
>
> iommus = <&apps_smmu 0x240e 0x440>,
> <&apps_smmu 0x196e 0x0>,
>
> ---
> base-commit: 5c4d4169604b335c38bbc79bc1fc03042981fc6f
> change-id: 20260922-glymur-dtfix-6314526b4b02
>
> Best regards,
> --
> Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
>
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