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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: "Benoît Monin" <benoit.monin@bootlin.com>
Cc: "Daniel Lezcano" <daniel.lezcano@kernel.org>,
	"Thomas Gleixner" <tglx@kernel.org>,
	"Dragan Mladjenovic" <dragan.mladjenovic@syrmia.com>,
	"Chao-ying Fu" <cfu@wavecomp.com>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Radu Rendec" <radu@rendec.net>,
	"Vladimir Kondratiev" <vladimir.kondratiev@mobileye.com>,
	"Tawfik Bayouk" <tawfik.bayouk@mobileye.com>,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	"Théo Lebrun" <theo.lebrun@bootlin.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/5] clocksource: mips-gic-timer: Simplify gic_next_event() for per-cpu timer
Date: Mon, 28 Sep 2026 11:29:53 +0200	[thread overview]
Message-ID: <arozkbowREVQdv7q@alpha.franken.de> (raw)
In-Reply-To: <20260907-sync-gic-counters-v3-4-3d891ddabdaf@bootlin.com>

On Mon, Sep 07, 2026 at 02:46:38PM +0200, Benoît Monin wrote:
> The GIC clock event device is registered per CPU and is flagged with
> CLOCK_EVT_FEAT_C3STOP. This guarantees that the set_next_event() callback
> is always invoked on the CPU of the event.
> 
> Drop the code path configuring the compare register of another CPU as it
> is never called and does not correctly handle the case of having multiple
> clusters, and document this guarantee by adding the CLOCK_EVT_FEAT_PERCPU
> flag to the clock event device features.
> 
> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
> ---
>  drivers/clocksource/mips-gic-timer.c | 10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
> index 1501c7db9a8e..cdaf4ba1d509 100644
> --- a/drivers/clocksource/mips-gic-timer.c
> +++ b/drivers/clocksource/mips-gic-timer.c
> @@ -52,18 +52,13 @@ static u64 notrace gic_read_count(void)
>  
>  static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
>  {
> -	int cpu = cpumask_first(evt->cpumask);
>  	u64 cnt;
>  	int res;
>  
>  	cnt = gic_read_count();
>  	cnt += (u64)delta;
> -	if (cpu == raw_smp_processor_id()) {
> -		write_gic_vl_compare(cnt);
> -	} else {
> -		write_gic_vl_other(mips_cm_vp_id(cpu));
> -		write_gic_vo_compare(cnt);
> -	}
> +	write_gic_vl_compare(cnt);
> +
>  	res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
>  	return res;
>  }
> @@ -82,6 +77,7 @@ static void gic_clockevent_cpu_init(unsigned int cpu,
>  {
>  	cd->name		= "MIPS GIC";
>  	cd->features		= CLOCK_EVT_FEAT_ONESHOT |
> +				  CLOCK_EVT_FEAT_PERCPU |
>  				  CLOCK_EVT_FEAT_C3STOP;
>  
>  	cd->rating		= 350;
> 
> -- 
> 2.55.0

Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2026-09-28  9:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-07 12:46 [PATCH v3 0/5] MIPS: GIC clocksource/irqchip improvements and fixes for multi-cluster systems Benoît Monin
2026-09-07 12:46 ` [PATCH v3 1/5] irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic() Benoît Monin
2026-09-28  8:17   ` Thomas Bogendoerfer
2026-09-07 12:46 ` [PATCH v3 2/5] irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity() Benoît Monin
2026-09-28  8:22   ` Thomas Bogendoerfer
2026-09-07 12:46 ` [PATCH v3 3/5] irqchip/mips-gic: Enable interrupt when moving affinity across clusters Benoît Monin
2026-09-28  8:35   ` Thomas Bogendoerfer
2026-09-28 13:21     ` Benoît Monin
2026-09-07 12:46 ` [PATCH v3 4/5] clocksource: mips-gic-timer: Simplify gic_next_event() for per-cpu timer Benoît Monin
2026-09-28  9:29   ` Thomas Bogendoerfer [this message]
2026-09-07 12:46 ` [PATCH v3 5/5] clocksource: mips-gic-timer: Use local counter on synced multi-cluster systems Benoît Monin
2026-09-28 10:26   ` Thomas Bogendoerfer
2026-09-28 14:56     ` Benoît Monin
2026-09-19 21:26 ` [PATCH v3 0/5] MIPS: GIC clocksource/irqchip improvements and fixes for " Thomas Gleixner

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