* [PATCH] iio: light: vcnl4035: Fix reversed ALS mode bit
@ 2026-10-12 14:43 Alexander Sarmanow
2026-10-12 15:51 ` Nuno Sá
0 siblings, 1 reply; 2+ messages in thread
From: Alexander Sarmanow @ 2026-10-12 14:43 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Andy Shevchenko, Parthiban Nallathambi
Cc: linux-iio, linux-kernel, Alexander Sarmanow, stable
According to the datasheet (table 2) the ALS_SD bit behaves the opposite
way the current ALS mode defines are set, writing 0 powers the sensor
and writing 1 shuts it down.
The current driver thinks the ALS is up while it's actually shut down
and it's down when the systems powers it up.
Fixes: 55707294c4eb ("iio: light: Add support for vishay vcnl4035")
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Sarmanow <as@discnull.de>
---
Tested on a Raspberry Pi 3B+ with a VCNL4035 on I2C, running Raspberry
Pi OS downstream kernel 6.18.50. Checked with i2cget that bit 0 of the
config register 0x00 is 0 while PM runtime resume and 1 once it's
runtime suspended. Also builds cleanly against iio/testing.
drivers/iio/light/vcnl4035.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/light/vcnl4035.c b/drivers/iio/light/vcnl4035.c
index ce1bd42b0c7c..f1cc75245001 100644
--- a/drivers/iio/light/vcnl4035.c
+++ b/drivers/iio/light/vcnl4035.c
@@ -44,8 +44,8 @@
#define VCNL4035_DEV_ID_MASK GENMASK(7, 0)
/* Default values */
-#define VCNL4035_MODE_ALS_ENABLE BIT(0)
-#define VCNL4035_MODE_ALS_DISABLE 0x00
+#define VCNL4035_MODE_ALS_ENABLE 0x00
+#define VCNL4035_MODE_ALS_DISABLE BIT(0)
#define VCNL4035_MODE_ALS_INT_ENABLE BIT(1)
#define VCNL4035_MODE_ALS_INT_DISABLE 0
#define VCNL4035_DEV_ID_VAL 0x80
base-commit: a22dc7ebb21a6bd4c8b63bc2c1dd46a24945aae7
Best regards,
Alexander
--
2.47.3
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] iio: light: vcnl4035: Fix reversed ALS mode bit
2026-10-12 14:43 [PATCH] iio: light: vcnl4035: Fix reversed ALS mode bit Alexander Sarmanow
@ 2026-10-12 15:51 ` Nuno Sá
0 siblings, 0 replies; 2+ messages in thread
From: Nuno Sá @ 2026-10-12 15:51 UTC (permalink / raw)
To: Alexander Sarmanow
Cc: Jonathan Cameron, David Lechner, Andy Shevchenko,
Parthiban Nallathambi, linux-iio, linux-kernel, stable
On Mon, Oct 12, 2026 at 04:43:15PM +0200, Alexander Sarmanow wrote:
> According to the datasheet (table 2) the ALS_SD bit behaves the opposite
> way the current ALS mode defines are set, writing 0 powers the sensor
> and writing 1 shuts it down.
>
> The current driver thinks the ALS is up while it's actually shut down
> and it's down when the systems powers it up.
>
> Fixes: 55707294c4eb ("iio: light: Add support for vishay vcnl4035")
> Cc: stable@vger.kernel.org
> Signed-off-by: Alexander Sarmanow <as@discnull.de>
> ---
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
> Tested on a Raspberry Pi 3B+ with a VCNL4035 on I2C, running Raspberry
> Pi OS downstream kernel 6.18.50. Checked with i2cget that bit 0 of the
> config register 0x00 is 0 while PM runtime resume and 1 once it's
> runtime suspended. Also builds cleanly against iio/testing.
>
> drivers/iio/light/vcnl4035.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iio/light/vcnl4035.c b/drivers/iio/light/vcnl4035.c
> index ce1bd42b0c7c..f1cc75245001 100644
> --- a/drivers/iio/light/vcnl4035.c
> +++ b/drivers/iio/light/vcnl4035.c
> @@ -44,8 +44,8 @@
> #define VCNL4035_DEV_ID_MASK GENMASK(7, 0)
>
> /* Default values */
> -#define VCNL4035_MODE_ALS_ENABLE BIT(0)
> -#define VCNL4035_MODE_ALS_DISABLE 0x00
> +#define VCNL4035_MODE_ALS_ENABLE 0x00
> +#define VCNL4035_MODE_ALS_DISABLE BIT(0)
> #define VCNL4035_MODE_ALS_INT_ENABLE BIT(1)
> #define VCNL4035_MODE_ALS_INT_DISABLE 0
> #define VCNL4035_DEV_ID_VAL 0x80
>
> base-commit: a22dc7ebb21a6bd4c8b63bc2c1dd46a24945aae7
>
> Best regards,
> Alexander
> --
> 2.47.3
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2026-10-12 15:51 ` Nuno Sá
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