linux-next: manual merge of the drm tree with the qcom tree

linux-next: manual merge of the drm tree with the qcom tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/soc/qcom/qcom-geni-se.c

between commit:

  803f9950a6c6e ("soc: qcom: geni-se: provide PROG_RAM_DEPTH for I2C HUB Serial Engines")

from the qcom tree and commit:

  d1750c530e9b9 ("soc: qcom: geni-se: Fix fw_end computed before round-up; propagate size to caller")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --combined drivers/soc/qcom/qcom-geni-se.c
index 074087c592cc3,6ac2bdc16984c..0000000000000
--- a/drivers/soc/qcom/qcom-geni-se.c
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@@ -42,7 -42,7 +42,7 @@@ EXPORT_TRACEPOINT_SYMBOL_GPL(geni_se_re
   *
   * GENI based QUP is a highly-flexible and programmable module for supporting
   * a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single
 - * QUP module can provide upto 8 serial interfaces, using its internal
 + * QUP module can provide up to 8 serial interfaces, using its internal
   * serial engines. The actual configuration is determined by the target
   * platform configuration. The protocol supported by each interface is
   * determined by the firmware loaded to the serial engine. Each SE consists
@@@ -101,26 -101,22 +101,26 @@@
   * @base:		Base address of this instance of QUP wrapper core
   * @clks:		Handle to the primary & optional secondary AHB clocks
   * @num_clks:		Count of clocks
 + * @prog_ram_depth:	Available CFG RAM depth for instance without SE_HW_PARAM_2
   */
  struct geni_wrapper {
  	struct device *dev;
  	void __iomem *base;
  	struct clk_bulk_data clks[MAX_CLKS];
  	unsigned int num_clks;
 +	unsigned int prog_ram_depth;
  };
  
  /**
   * struct geni_se_desc - Data structure to represent the QUP Wrapper resources
   * @clks:		Name of the primary & optional secondary AHB clocks
   * @num_clks:		Count of clock names
 + * @prog_ram_depth:	Available CFG RAM depth for instance without SE_HW_PARAM_2
   */
  struct geni_se_desc {
  	unsigned int num_clks;
  	const char * const *clks;
 +	unsigned int prog_ram_depth;
  };
  
  static const char * const icc_path_names[] = {"qup-core", "qup-config",
@@@ -924,7 -920,7 +924,7 @@@ void geni_se_rx_dma_unprep(struct geni_
  }
  EXPORT_SYMBOL_GPL(geni_se_rx_dma_unprep);
  
 -int geni_icc_get(struct geni_se *se, const char *icc_ddr)
 +int geni_icc_get(struct geni_se *se)
  {
  	struct geni_icc_path *icc_paths = se->icc_paths;
  
@@@ -1221,7 -1217,7 +1221,7 @@@ int geni_se_resources_init(struct geni_
  
  	se->has_opp = (ret == 0);
  
 -	ret = geni_icc_get(se, "qup-memory");
 +	ret = geni_icc_get(se);
  	if (ret)
  		return ret;
  
@@@ -1248,7 -1244,6 +1248,7 @@@ static const struct se_fw_hdr *geni_fin
  						     enum geni_se_protocol_type protocol,
  						     u32 *fw_size_out)
  {
 +	struct geni_wrapper *wrapper = se->wrapper;
  	struct device *dev = se->dev;
  	const struct elf32_hdr *ehdr;
  	const struct elf32_phdr *phdrs;
@@@ -1313,11 -1308,8 +1313,11 @@@
  		cfg_val_end = le16_to_cpu(sefw->cfg_val_offset) +
  			      le16_to_cpu(sefw->cfg_size_in_items) * sizeof(u32);
  
 -		prog_ram_depth = FIELD_GET(PROG_RAM_DEPTH_MSK,
 -					   readl_relaxed(se->base + SE_HW_PARAM_2));
 +		if (wrapper->prog_ram_depth)
 +			prog_ram_depth = wrapper->prog_ram_depth;
 +		else
 +			prog_ram_depth = FIELD_GET(PROG_RAM_DEPTH_MSK,
 +					readl_relaxed(se->base + SE_HW_PARAM_2));
  		if (fw_size >= prog_ram_depth) {
  			dev_err(dev, "Firmware size (%u) exceeds RAM size (%u)\n",
  				fw_size, prog_ram_depth);
@@@ -1628,7 -1620,6 +1628,7 @@@ static int geni_se_probe(struct platfor
  		return PTR_ERR(wrapper->base);
  
  	desc = device_get_match_data(&pdev->dev);
 +	wrapper->prog_ram_depth = desc->prog_ram_depth;
  
  	if (!has_acpi_companion(&pdev->dev) && desc->num_clks) {
  		int i;
@@@ -1681,7 -1672,6 +1681,7 @@@ static const char * const i2c_master_hu
  static const struct geni_se_desc i2c_master_hub_desc = {
  	.clks = i2c_master_hub_clks,
  	.num_clks = ARRAY_SIZE(i2c_master_hub_clks),
 +	.prog_ram_depth = 1020,
  };
  
  static const struct of_device_id geni_se_dt_match[] = {

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linux-next: manual merge of the drm tree with the qcom tree

[Mark Brown]

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Hi all,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/firmware/qcom/Kconfig

between commits:

  618aedff70fbe ("firmware: QCOM interfaces should depend on ARCH_QCOM")
  50508d3e0abd8 ("firmware: qcom: scm: Hide QCOM_SCM instead of depending on ARCH_QCOM")

from the qcom tree and commit:

  8fecd3194de33 ("firmware: QCOM interfaces should depend on ARCH_QCOM")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --combined drivers/firmware/qcom/Kconfig
index 3ad22f8fc3e5f,691db0ded8e8c..0000000000000
--- a/drivers/firmware/qcom/Kconfig
+++ b/drivers/firmware/qcom/Kconfig
@@@ -26,7 -26,8 +26,7 @@@ config QCOM_PAS_TE
  	  by the firmware TEE implementation as the backend.
  
  config QCOM_SCM
 -	tristate "Qualcomm PAS SCM interface driver"
 -	depends on ARCH_QCOM || COMPILE_TEST
 +	tristate "Qualcomm PAS SCM interface driver" if ARCH_QCOM || COMPILE_TEST
  	select QCOM_PAS
  	select QCOM_TZMEM
  	default y if ARCH_QCOM
@@@ -35,17 -36,33 +35,17 @@@ config QCOM_TZME
  	tristate
  	select GENERIC_ALLOCATOR
  
 -choice
 -	prompt "TrustZone interface memory allocator mode"
 -	depends on QCOM_TZMEM
 -	default QCOM_TZMEM_MODE_GENERIC
 -	help
 -	  Selects the mode of the memory allocator providing memory buffers of
 -	  suitable format for sharing with the TrustZone. If in doubt, select
 -	  'Generic'.
 -
 -config QCOM_TZMEM_MODE_GENERIC
 -	bool "Generic"
 -	help
 -	  Use the generic allocator mode. The memory is page-aligned, non-cachable
 -	  and physically contiguous.
 -
  config QCOM_TZMEM_MODE_SHMBRIDGE
 -	bool "SHM Bridge"
 +	bool "TrustZone interface memory allocator: SHM Bridge"
 +	depends on QCOM_TZMEM
  	help
 -	  Use Qualcomm Shared Memory Bridge. The memory has the same alignment as
 -	  in the 'Generic' allocator but is also explicitly marked as an SHM Bridge
 -	  buffer.
 +	  Use Qualcomm Shared Memory Bridge as memory allocator. The memory has the
 +	  same alignment as in the 'Generic' allocator, which is used when this option
 +	  is disabled, but is also explicitly marked as an SHM Bridge buffer.
  
  	  With this selected, all buffers passed to the TrustZone must be allocated
  	  using the TZMem allocator or else the TrustZone will refuse to use them.
  
 -endchoice
 -
  config QCOM_QSEECOM
  	bool "Qualcomm QSEECOM interface driver"
  	depends on QCOM_SCM=y

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