From: Andi Shyti <andi.shyti@kernel.org>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Robert Foss <rfoss@kernel.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/5] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime
Date: Tue, 6 Oct 2026 11:34:37 +0200 [thread overview]
Message-ID: <asS_Z1RWYiwXnXop@zenone.zhora.eu> (raw)
In-Reply-To: <20261004-cci-imp-v1-3-227d12cb4829@oss.qualcomm.com>
Hi Loic,
On Sun, Oct 04, 2026 at 09:09:49PM +0200, Loic Poulain wrote:
> In theory, every SoC integrating a CCI revision that differs from
> an existing one should introduce a dedicated compatible string.
> In practice, most CCI instances still fall back to the msm8996
> compat (v1.4.0), one of the oldest supported versions. In order
> to take advantage of capabilities introduced in later versions,
> such as larger queues (v1.6.0) or threshold IRQ support (v1.7.0),
> we need to properly dinstinquish the different variants.
distinquish/distinguish (no need to resend for this).
I didn't see anything wrong in the rest of the patch.
Thanks,
Andi
next prev parent reply other threads:[~2026-10-06 9:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-04 19:09 [PATCH 0/5] i2c: qcom-cci: Runtime capability detection and improved read/write Loic Poulain
2026-10-04 19:09 ` [PATCH 1/5] i2c: qcom-cci: Factor out write command queue programming Loic Poulain
2026-10-06 9:24 ` Andi Shyti
2026-10-04 19:09 ` [PATCH 2/5] i2c: qcom-cci: Handle and report queue overflow/underflow interrupts Loic Poulain
2026-10-06 9:28 ` Andi Shyti
2026-10-04 19:09 ` [PATCH 3/5] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime Loic Poulain
2026-10-06 9:34 ` Andi Shyti [this message]
2026-10-04 19:09 ` [PATCH 4/5] i2c: qcom-cci: Add burst write support Loic Poulain
2026-10-04 19:09 ` [PATCH 5/5] i2c: qcom-cci: Extend i2c read limits based on CCI revision Loic Poulain
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