From: Vinod Koul <vkoul@kernel.org>
To: Devendra K Verma <devverma@amd.com>
Cc: mani@kernel.org, frank.li@kernel.org, den@valinux.co.jp,
dmaengine@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com
Subject: Re: [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction
Date: Wed, 7 Oct 2026 12:53:18 +0200 [thread overview]
Message-ID: <asYknhxjo8mo8CeG@parshuram> (raw)
In-Reply-To: <20261007100336.4009004-1-devverma@amd.com>
On 07-10-26, 15:33, Devendra K Verma wrote:
> These are minor and cosmetic changes.
>
> o If the macros declaring the bit positions of a register
> are in order then it provides a good view. Corrected
> the ordering for once such register.
> o Corrected the typo under the IP related data struct to
> have the correct name under respective IP structs.
>
> Previous reviewed-by tags were part of the following
> review:
Please post a v3 after rebase on dma/next. As I told you code has
changed and this does not apply and you posted the same thing again!
>
> https://lore.kernel.org/all/aoW7vxy2lpXEbmRq@SMW015318/
> https://lore.kernel.org/all/dx5jvko7ygrqugzkt3k74l3d7lk7iauikmxrzuhvn2b4bdv5ub@s2l6zl3alx3z/#t
>
> Devendra K Verma (2):
> dmaengine: dw-edma: Sort Register Field Macros by Bit Position
> dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment
>
> drivers/dma/dw-edma/dw-edma-pcie.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> --
> 2.43.0
--
~Vinod
prev parent reply other threads:[~2026-10-07 10:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 10:03 Devendra K Verma
2026-10-07 10:03 ` [PATCH RESEND v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
2026-10-07 10:03 ` [PATCH RESEND v2 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-10-07 10:53 ` Vinod Koul [this message]
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