* [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings
@ 2026-10-20 2:37 Xincheng Ji
2026-10-20 6:10 ` Shawn Lin
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Xincheng Ji @ 2026-10-20 2:37 UTC (permalink / raw)
To: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas,
Niklas Cassel, Xincheng Zhang, Jia Wang
Cc: Manivannan Sadhasivam, linux-pci, linux-kernel, Xincheng Ji
No outbound iATU translation is required when the parent-bus address
matches the PCI address. This is a DesignWare controller property, not
an UltraRISC-specific behavior.
Compare the addresses directly and skip MEM outbound iATU setup when
they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
use outbound iATU windows.
Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
Fixes: 8da2b970ed4c ("PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000")
Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
---
This series follows up on the recently applied MEM outbound iATU support.
The DesignWare outbound no-match path does not translate addresses. Skip
MEM outbound iATU programming whenever atu.parent_bus_addr matches
atu.pci_addr, rather than relying on a driver-specific flag. CFG and I/O
accesses, as well as non-identity-mapped MEM ranges, continue to use
outbound iATU windows.
The UltraRISC DP1000 driver has removed the now-unneeded
bypass_ob_mem_iatu, and the general DesignWare PCIe host
code has also dropped bypass_ob_mem_iatu, directly comparing
the parent bus and PCI addresses before setting up the MEM
outbound iATU window
---
Changes in v2:
- Merge patch1 and patch2, because they depend on each other
- Link to v1: https://patch.msgid.link/20261019-dw-pci-fix-v1-0-9b7860f919b9@ultrarisc.com
---
drivers/pci/controller/dwc/pcie-designware-host.c | 17 +++++------------
drivers/pci/controller/dwc/pcie-designware.h | 1 -
drivers/pci/controller/dwc/pcie-ultrarisc.c | 6 ------
3 files changed, 5 insertions(+), 19 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index cf5ca281e91b..c593a1f1c2e0 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -918,19 +918,12 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
atu.pci_addr = entry->res->start - entry->offset;
- if (pp->bypass_ob_mem_iatu) {
- /*
- * The no-match pass-through path preserves the correct
- * PCI address only for identity-mapped MEM ranges.
- */
- if (atu.parent_bus_addr != atu.pci_addr) {
- dev_err(pci->dev,
- "Cannot bypass outbound iATU for non-identity MEM range %pr\n",
- entry->res);
- return -EINVAL;
- }
+ /*
+ * No ATU translation is required when the parent-bus address matches
+ * the PCI address. This is a property of the DesignWare controller.
+ */
+ if (atu.parent_bus_addr == atu.pci_addr)
continue;
- }
/* Adjust iATU size if MSG TLP region was allocated before */
if (pp->msg_res && pp->msg_res->parent == entry->res)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 799c05213ae3..128729fee607 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -471,7 +471,6 @@ struct dw_pcie_rp {
struct pci_config_window *cfg;
bool ecam_enabled;
bool native_ecam;
- bool bypass_ob_mem_iatu;
bool skip_l23_ready;
bool skip_pwrctrl_off;
/* Set if the RC loses power during suspend */
diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
index 523f454c6c52..a0d328c0c09b 100644
--- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
+++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
@@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
pp = &pci->pp;
- /*
- * DP1000 routes MEM transactions without outbound iATU windows, which
- * avoids the 16-window/4GB-per-window aperture limit.
- */
- pp->bypass_ob_mem_iatu = true;
-
platform_set_drvdata(pdev, ultra);
ret = ultrarisc_pcie_init_clks(ultra);
---
base-commit: 0a2602de077462d3111eb9fd3da5b12a57fc6c93
change-id: 20261015-dw-pci-fix-c8e51f83be02
Best regards,
--
Xincheng Ji <jixincheng@ultrarisc.com>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings
2026-10-20 2:37 [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings Xincheng Ji
@ 2026-10-20 6:10 ` Shawn Lin
2026-10-20 8:36 ` Koichiro Den
2026-10-20 9:08 ` Niklas Cassel
2 siblings, 0 replies; 4+ messages in thread
From: Shawn Lin @ 2026-10-20 6:10 UTC (permalink / raw)
To: Xincheng Ji, Jingoo Han, Manivannan Sadhasivam,
Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring,
Bjorn Helgaas, Niklas Cassel, Xincheng Zhang, Jia Wang
Cc: shawn.lin, Manivannan Sadhasivam, linux-pci, linux-kernel
在 2026/10/20 星期二 10:37, Xincheng Ji 写道:
> No outbound iATU translation is required when the parent-bus address
> matches the PCI address. This is a DesignWare controller property, not
> an UltraRISC-specific behavior.
>
> Compare the addresses directly and skip MEM outbound iATU setup when
> they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
> CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
> use outbound iATU windows.
>
Just make sure there is no regression on my Rockchip platforms, so
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
> Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
> Fixes: 8da2b970ed4c ("PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000")
> Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
> ---
> This series follows up on the recently applied MEM outbound iATU support.
>
> The DesignWare outbound no-match path does not translate addresses. Skip
> MEM outbound iATU programming whenever atu.parent_bus_addr matches
> atu.pci_addr, rather than relying on a driver-specific flag. CFG and I/O
> accesses, as well as non-identity-mapped MEM ranges, continue to use
> outbound iATU windows.
>
> The UltraRISC DP1000 driver has removed the now-unneeded
> bypass_ob_mem_iatu, and the general DesignWare PCIe host
> code has also dropped bypass_ob_mem_iatu, directly comparing
> the parent bus and PCI addresses before setting up the MEM
> outbound iATU window
> ---
> Changes in v2:
> - Merge patch1 and patch2, because they depend on each other
> - Link to v1: https://patch.msgid.link/20261019-dw-pci-fix-v1-0-9b7860f919b9@ultrarisc.com
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 17 +++++------------
> drivers/pci/controller/dwc/pcie-designware.h | 1 -
> drivers/pci/controller/dwc/pcie-ultrarisc.c | 6 ------
> 3 files changed, 5 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index cf5ca281e91b..c593a1f1c2e0 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -918,19 +918,12 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
> atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
> atu.pci_addr = entry->res->start - entry->offset;
>
> - if (pp->bypass_ob_mem_iatu) {
> - /*
> - * The no-match pass-through path preserves the correct
> - * PCI address only for identity-mapped MEM ranges.
> - */
> - if (atu.parent_bus_addr != atu.pci_addr) {
> - dev_err(pci->dev,
> - "Cannot bypass outbound iATU for non-identity MEM range %pr\n",
> - entry->res);
> - return -EINVAL;
> - }
> + /*
> + * No ATU translation is required when the parent-bus address matches
> + * the PCI address. This is a property of the DesignWare controller.
> + */
> + if (atu.parent_bus_addr == atu.pci_addr)
> continue;
> - }
>
> /* Adjust iATU size if MSG TLP region was allocated before */
> if (pp->msg_res && pp->msg_res->parent == entry->res)
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 799c05213ae3..128729fee607 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -471,7 +471,6 @@ struct dw_pcie_rp {
> struct pci_config_window *cfg;
> bool ecam_enabled;
> bool native_ecam;
> - bool bypass_ob_mem_iatu;
> bool skip_l23_ready;
> bool skip_pwrctrl_off;
> /* Set if the RC loses power during suspend */
> diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> index 523f454c6c52..a0d328c0c09b 100644
> --- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
> +++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> @@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
>
> pp = &pci->pp;
>
> - /*
> - * DP1000 routes MEM transactions without outbound iATU windows, which
> - * avoids the 16-window/4GB-per-window aperture limit.
> - */
> - pp->bypass_ob_mem_iatu = true;
> -
> platform_set_drvdata(pdev, ultra);
>
> ret = ultrarisc_pcie_init_clks(ultra);
>
> ---
> base-commit: 0a2602de077462d3111eb9fd3da5b12a57fc6c93
> change-id: 20261015-dw-pci-fix-c8e51f83be02
>
> Best regards,
> --
> Xincheng Ji <jixincheng@ultrarisc.com>
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings
2026-10-20 2:37 [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings Xincheng Ji
2026-10-20 6:10 ` Shawn Lin
@ 2026-10-20 8:36 ` Koichiro Den
2026-10-20 9:08 ` Niklas Cassel
2 siblings, 0 replies; 4+ messages in thread
From: Koichiro Den @ 2026-10-20 8:36 UTC (permalink / raw)
To: Xincheng Ji
Cc: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas,
Niklas Cassel, Xincheng Zhang, Jia Wang, Manivannan Sadhasivam,
linux-pci, linux-kernel
On Tue, Oct 20, 2026 at 10:37:35AM +0800, Xincheng Ji wrote:
> No outbound iATU translation is required when the parent-bus address
> matches the PCI address. This is a DesignWare controller property, not
> an UltraRISC-specific behavior.
>
> Compare the addresses directly and skip MEM outbound iATU setup when
> they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
> CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
> use outbound iATU windows.
Tested this on R-Car S4 (DWC PCIe 5.20a) in RP mode and did not observe any
issues.
Tested-by: Koichiro Den <den@valinux.co.jp>
>
> Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
> Fixes: 8da2b970ed4c ("PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000")
> Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
> ---
> This series follows up on the recently applied MEM outbound iATU support.
>
> The DesignWare outbound no-match path does not translate addresses. Skip
> MEM outbound iATU programming whenever atu.parent_bus_addr matches
> atu.pci_addr, rather than relying on a driver-specific flag. CFG and I/O
> accesses, as well as non-identity-mapped MEM ranges, continue to use
> outbound iATU windows.
>
> The UltraRISC DP1000 driver has removed the now-unneeded
> bypass_ob_mem_iatu, and the general DesignWare PCIe host
> code has also dropped bypass_ob_mem_iatu, directly comparing
> the parent bus and PCI addresses before setting up the MEM
> outbound iATU window
> ---
> Changes in v2:
> - Merge patch1 and patch2, because they depend on each other
> - Link to v1: https://patch.msgid.link/20261019-dw-pci-fix-v1-0-9b7860f919b9@ultrarisc.com
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 17 +++++------------
> drivers/pci/controller/dwc/pcie-designware.h | 1 -
> drivers/pci/controller/dwc/pcie-ultrarisc.c | 6 ------
> 3 files changed, 5 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index cf5ca281e91b..c593a1f1c2e0 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -918,19 +918,12 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
> atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
> atu.pci_addr = entry->res->start - entry->offset;
>
> - if (pp->bypass_ob_mem_iatu) {
> - /*
> - * The no-match pass-through path preserves the correct
> - * PCI address only for identity-mapped MEM ranges.
> - */
> - if (atu.parent_bus_addr != atu.pci_addr) {
> - dev_err(pci->dev,
> - "Cannot bypass outbound iATU for non-identity MEM range %pr\n",
> - entry->res);
> - return -EINVAL;
> - }
> + /*
> + * No ATU translation is required when the parent-bus address matches
> + * the PCI address. This is a property of the DesignWare controller.
> + */
> + if (atu.parent_bus_addr == atu.pci_addr)
> continue;
> - }
>
> /* Adjust iATU size if MSG TLP region was allocated before */
> if (pp->msg_res && pp->msg_res->parent == entry->res)
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 799c05213ae3..128729fee607 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -471,7 +471,6 @@ struct dw_pcie_rp {
> struct pci_config_window *cfg;
> bool ecam_enabled;
> bool native_ecam;
> - bool bypass_ob_mem_iatu;
> bool skip_l23_ready;
> bool skip_pwrctrl_off;
> /* Set if the RC loses power during suspend */
> diff --git a/drivers/pci/controller/dwc/pcie-ultrarisc.c b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> index 523f454c6c52..a0d328c0c09b 100644
> --- a/drivers/pci/controller/dwc/pcie-ultrarisc.c
> +++ b/drivers/pci/controller/dwc/pcie-ultrarisc.c
> @@ -154,12 +154,6 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
>
> pp = &pci->pp;
>
> - /*
> - * DP1000 routes MEM transactions without outbound iATU windows, which
> - * avoids the 16-window/4GB-per-window aperture limit.
> - */
> - pp->bypass_ob_mem_iatu = true;
> -
> platform_set_drvdata(pdev, ultra);
>
> ret = ultrarisc_pcie_init_clks(ultra);
>
> ---
> base-commit: 0a2602de077462d3111eb9fd3da5b12a57fc6c93
> change-id: 20261015-dw-pci-fix-c8e51f83be02
>
> Best regards,
> --
> Xincheng Ji <jixincheng@ultrarisc.com>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings
2026-10-20 2:37 [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings Xincheng Ji
2026-10-20 6:10 ` Shawn Lin
2026-10-20 8:36 ` Koichiro Den
@ 2026-10-20 9:08 ` Niklas Cassel
2 siblings, 0 replies; 4+ messages in thread
From: Niklas Cassel @ 2026-10-20 9:08 UTC (permalink / raw)
To: Xincheng Ji
Cc: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas,
Xincheng Zhang, Jia Wang, Manivannan Sadhasivam, linux-pci,
linux-kernel
On Tue, Oct 20, 2026 at 10:37:35AM +0800, Xincheng Ji wrote:
> No outbound iATU translation is required when the parent-bus address
> matches the PCI address. This is a DesignWare controller property, not
> an UltraRISC-specific behavior.
>
> Compare the addresses directly and skip MEM outbound iATU setup when
> they match. Remove bypass_ob_mem_iatu and the UltraRISC-specific setting.
> CFG and I/O accesses, as well as non-identity-mapped MEM ranges, still
> use outbound iATU windows.
>
> Fixes: 17b478b29cf1 ("PCI: dwc: Allow drivers to skip MEM outbound iATU setup")
> Fixes: 8da2b970ed4c ("PCI: ultrarisc: Skip MEM outbound iATU setup on DP1000")
> Signed-off-by: Xincheng Ji <jixincheng@ultrarisc.com>
Looks good to me:
Reviewed-by: Niklas Cassel <cassel@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-10-20 9:08 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2026-10-20 2:37 [PATCH v2] PCI: dwc: Skip MEM outbound iATU setup for identity mappings Xincheng Ji
2026-10-20 6:10 ` Shawn Lin
2026-10-20 8:36 ` Koichiro Den
2026-10-20 9:08 ` Niklas Cassel
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