Re: [PATCH v2 3/9] media: i2c: ov7251: Report the pixel array rate for both link frequencies

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Wed, Oct 28, 2026 at 08:21:48PM +0900, Antoine Pichot wrote:
> pixel_rates[] gives V4L2_CID_PIXEL_RATE 48 MHz for the 240 MHz link and
> 63.84 MHz for the 319.2 MHz link, which is the CSI-2 bus rate of each
> link (one lane, 10 bits per pixel). The control is the pixel array rate,
> and Documentation/driver-api/media/tx-rx.rst says the bus rate "is not
> the same thing as the pixel rate on the camera sensor's pixel array
> which is indicated by the V4L2_CID_PIXEL_RATE control".
> 
> The pixel array runs from PLL2's 48 MHz system clock at both link
> frequencies: the PLL2 registers are the same in both tables, and the
> measured frame rate is 48000000 / (928 x VTS) with either link. On a
> Surface Book 2 at 319.2 MHz, VTS 1724 gives 30.0 fps; 63.84 MHz would
> give 39.9 fps. A Surface Pro 7+ measures 30.01, 60.16 and 90.45 fps at
> VTS 1724, 860 and 572, the same 48 MHz. Dave Stevenson saw the same on
> a Raspberry Pi with a 24 MHz clock, where libcamera asked for 100 fps
> and got 75, the ratio of the two rates.
> 
> Report 48 MHz for both link frequencies and drop the table.

...

> Fixes: ed9566ce1946 ("media: i2c: Add support for new frequencies to ov7251")
> Cc: stable@vger.kernel.org
> Link: https://lore.kernel.org/linux-media/CAPY8ntBFJJPg3y46gC=bNq_55QifC7mKmeq8+pAEDVN42fGUXw@mail.gmail.com/

Same comment about Link tag.

...

> +/* PLL2 sys_clk: the pixel array clock at both link frequencies */
> +#define OV7251_PIXEL_CLOCK 48000000

Perhaps

#define OV7251_PIXEL_CLOCK_Hz (48 * HZ_PER_MHZ)

(will require units.h to be included)?

-- 
With Best Regards,
Andy Shevchenko