From: Shawn Guo <shengchao.guo@oss.qualcomm.com>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Yu Zhang <yu.zhang@oss.qualcomm.com>,
Shuai Zhang <shuai.zhang@oss.qualcomm.com>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Abel Vesa <abel.vesa@oss.qualcomm.com>,
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Subject: Re: [PATCH RFC v3 3/5] arm64: dts: qcom: nord-ride-embedded: Enable PCIe controllers and PHY
Date: Sat, 31 Oct 2026 21:28:26 +0800 [thread overview]
Message-ID: <auXs-qBMufezjqml@QCOM-aGQu4IUr3Y> (raw)
In-Reply-To: <cb4e821d-a2e7-4ca7-be1d-f92e20e52260@oss.qualcomm.com>
On Sat, Oct 31, 2026 at 03:50:09PM +0530, Krishna Chaitanya Chundru wrote:
>
>
> On 10/21/2026 7:59 AM, Shawn Guo wrote:
> > From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> >
> > The Nord Ride Embedded board routes all four PCIe links, so enable
> > pcie0-pcie3 and the QMP PHY, supply the per-port PHY and PLL rails, and
> > describe the PERST# and WAKE# lines of each root port.
> >
> > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> > Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> > Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> > Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> > ---
> > .../boot/dts/qcom/nord-ride-embedded.dts | 49 +++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
> > index 49635695f832..fcc07226db8b 100644
> > --- a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
> > +++ b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
> > @@ -366,6 +366,55 @@ vreg_l3l_1p8: ldo3 {
> > };
> > };
> >
> > +&pcie_phy {
> > + vdda-phy-a-supply = <&vreg_l6a_1p2>;
> > + vdda-phy-b-supply = <&vreg_l4a_1p2>;
> > + vdda-phy-c-supply = <&vreg_l4a_1p2>;
> > + vdda-phy-d-supply = <&vreg_l4a_1p2>;
> > + vdda-pll-a-supply = <&vreg_l1e_0p9>;
> Hi Shawn,
>
> I did a mistake while sharing these changes, pll supply for b, c, d should be
> l2e instead of l1e.
> - vdda-pll-b-supply = <&vreg_l1e_0p9>;
> - vdda-pll-c-supply = <&vreg_l1e_0p9>;
> - vdda-pll-d-supply = <&vreg_l1e_0p9>;
> + vdda-pll-b-supply = <&vreg_l2e_0p9>;
> + vdda-pll-c-supply = <&vreg_l2e_0p9>;
> + vdda-pll-d-supply = <&vreg_l2e_0p9>;
>
> Can you update them as this patch is not applied yet.
Sure! I checked schematics and RRD board needs the same correction.
Shawn
next prev parent reply other threads:[~2026-10-31 13:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 2:29 [PATCH RFC v3 0/5] arm64: dts: qcom: nord: Add PCIe and WLAN/BT support Shawn Guo
2026-10-21 2:29 ` [PATCH RFC v3 1/5] arm64: dts: qcom: nord: Add PCIe PHY and controller nodes Shawn Guo
2026-10-21 2:29 ` [PATCH RFC v3 2/5] arm64: dts: qcom: nord-rrd: Enable PCIe controllers and PHY Shawn Guo
2026-10-21 2:29 ` [PATCH RFC v3 3/5] arm64: dts: qcom: nord-ride-embedded: " Shawn Guo
2026-10-31 10:20 ` Krishna Chaitanya Chundru
2026-10-31 13:28 ` Shawn Guo [this message]
2026-10-21 2:29 ` [PATCH RFC v3 4/5] arm64: dts: qcom: nord-ride-embedded: Add WCN7850 WLAN support Shawn Guo
2026-10-21 2:29 ` [PATCH RFC v3 5/5] arm64: dts: qcom: nord-ride-embedded: Add WCN7850 Bluetooth support Shawn Guo
2026-10-21 9:39 ` Bartosz Golaszewski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=auXs-qBMufezjqml@QCOM-aGQu4IUr3Y \
--to=shengchao.guo@oss.qualcomm.com \
--cc=abel.vesa@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=bartosz.golaszewski@oss.qualcomm.com \
--cc=brgl@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krishna.chundru@oss.qualcomm.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
--cc=shuai.zhang@oss.qualcomm.com \
--cc=yu.zhang@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®