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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: James Hilliard <james.hilliard1@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
	Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
	Sergey Khimich <serghox@gmail.com>,
	Sia Jee Heng <jee.heng.sia@intel.com>,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Subject: Re: [PATCH v2 1/3] dmaengine: dw-axi-dmac: poll the correct enable bit during termination
Date: Tue, 10 Nov 2026 09:38:43 +0200	[thread overview]
Message-ID: <avLKA9He_lz81Kfz@ashevche-desk.local> (raw)
In-Reply-To: <20261109-submit-dw-axi-dma-stop-pause-v1-v2-1-64adc48df793@gmail.com>

On Mon, Nov 09, 2026 at 08:06:00PM -0700, James Hilliard wrote:
> For channels 16 through 31, the channel enable bits occupy bits 32 through
> 47 of the extended DMAC_CHEN register. dma_chan_terminate_all() only reads
> the low word and tests BIT(chan->id), so it can conclude that an upper-bank
> channel has stopped while its actual enable bit remains set. Descriptors
> can then be freed while hardware still owns them.
> 
> Poll axi_chan_is_hw_enable(), which already handles both register banks
> and the smaller channel layouts, instead of constructing another mask.

...

> -	ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val,
> -					!(val & chan_active), 1000, 50000);
> +	ret = readx_poll_timeout_atomic(axi_chan_is_hw_enable, chan, enabled, !enabled,
> +				       1 * USEC_PER_MSEC, 50 * USEC_PER_MSEC);

Indentation of the second line is broken, and the first one is too long, check
how I recommended to put in my reply to v1.

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2026-11-10  7:38 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10  3:05 [PATCH v2 0/3] dmaengine: dw-axi-dmac: fix termination and pause acknowledgment James Hilliard
2026-11-10  3:06 ` [PATCH v2 1/3] dmaengine: dw-axi-dmac: poll the correct enable bit during termination James Hilliard
2026-11-10  7:38   ` Andy Shevchenko [this message]
2026-11-10  3:06 ` [PATCH v2 2/3] dmaengine: dw-axi-dmac: retain descriptors when termination times out James Hilliard
2026-11-10  7:40   ` Andy Shevchenko
2026-11-10  3:06 ` [PATCH v2 3/3] dmaengine: dw-axi-dmac: preserve pending pause requests James Hilliard
2026-11-10  7:46   ` Andy Shevchenko

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