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From: Yury Norov <ynorov@nvidia.com>
To: Eliot Courtney <ecourtney@nvidia.com>
Cc: "Alice Ryhl" <aliceryhl@google.com>,
	"Burak Emir" <burak.emir@gmail.com>,
	"Yury Norov" <yury.norov@gmail.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Boqun Feng" <boqun@kernel.org>, "Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Trevor Gross" <tmgross@umich.edu>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Daniel Almeida" <daniel.almeida@collabora.com>,
	"Tamir Duberstein" <tamird@kernel.org>,
	"Alexandre Courbot" <acourbot@nvidia.com>,
	"Onur Özkan" <work@onurozkan.dev>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>, "Zhi Wang" <zhiw@nvidia.com>,
	rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org,
	nova-gpu@lists.linux.dev, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v11 3/5] gpu: nova-core: use Alignment size constants
Date: Tue, 10 Nov 2026 12:22:19 -0500	[thread overview]
Message-ID: <avNSy4Q5Bw269C5e@yury> (raw)
In-Reply-To: <20261109-chid-v11-3-082aa9bf5a91@nvidia.com>

On Mon, Nov 09, 2026 at 05:32:51PM +0900, Eliot Courtney wrote:
> Use `SizeConstants` for Alignment that are implemented now.
> 
> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
> Reviewed-by: Alice Ryhl <aliceryhl@google.com>
> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com>

Reviewed-by: Yury Norov <ynorov@nvidia.com>

> ---
>  drivers/gpu/nova-core/fb.rs               | 10 +++++-----
>  drivers/gpu/nova-core/fb/hal/gb100.rs     |  2 +-
>  drivers/gpu/nova-core/fsp.rs              |  4 ++--
>  drivers/gpu/nova-core/gpu.rs              |  7 ++-----
>  drivers/gpu/nova-core/gsp/fw.rs           | 12 +++---------
>  drivers/gpu/nova-core/mm.rs               |  2 +-
>  drivers/gpu/nova-core/mm/bar_user.rs      |  7 ++++---
>  drivers/gpu/nova-core/mm/pagetable/map.rs |  7 +++++--
>  drivers/gpu/nova-core/mm/pramin.rs        |  6 +++---
>  drivers/gpu/nova-core/vbios.rs            |  7 +++++--
>  10 files changed, 31 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs
> index b0c0b8fe6008..5ceb7760c78e 100644
> --- a/drivers/gpu/nova-core/fb.rs
> +++ b/drivers/gpu/nova-core/fb.rs
> @@ -219,7 +219,7 @@ pub(crate) fn new(
>          };
>  
>          let frts = {
> -            const FRTS_DOWN_ALIGN: Alignment = Alignment::new::<SZ_128K>();
> +            const FRTS_DOWN_ALIGN: Alignment = Alignment::SZ_128K;
>              let frts_size: u64 = hal.frts_size();
>              let frts_base = vga_workspace.start.align_down(FRTS_DOWN_ALIGN) - frts_size;
>  
> @@ -227,7 +227,7 @@ pub(crate) fn new(
>          };
>  
>          let boot = {
> -            const BOOTLOADER_DOWN_ALIGN: Alignment = Alignment::new::<SZ_4K>();
> +            const BOOTLOADER_DOWN_ALIGN: Alignment = Alignment::SZ_4K;
>              let bootloader_size = u64::from_safe_cast(gsp_fw.bootloader.ucode.size());
>              let bootloader_base = (frts.start - bootloader_size).align_down(BOOTLOADER_DOWN_ALIGN);
>  
> @@ -235,7 +235,7 @@ pub(crate) fn new(
>          };
>  
>          let fw_image = {
> -            const FW_IMAGE_DOWN_ALIGN: Alignment = Alignment::new::<SZ_64K>();
> +            const FW_IMAGE_DOWN_ALIGN: Alignment = Alignment::SZ_64K;
>              let fw_image_size = u64::from_safe_cast(gsp_fw.size());
>              let fw_image_addr = (boot.start - fw_image_size).align_down(FW_IMAGE_DOWN_ALIGN);
>  
> @@ -245,7 +245,7 @@ pub(crate) fn new(
>          let (vf_partition_count, wpr2_heap_size) = wpr2_heap_params(chipset, vgpu_state, fb.end)?;
>  
>          let wpr2_heap = {
> -            const WPR2_HEAP_DOWN_ALIGN: Alignment = Alignment::new::<SZ_1M>();
> +            const WPR2_HEAP_DOWN_ALIGN: Alignment = Alignment::SZ_1M;
>              let wpr2_heap_addr = fw_image
>                  .start
>                  .checked_sub(wpr2_heap_size)
> @@ -256,7 +256,7 @@ pub(crate) fn new(
>          };
>  
>          let wpr2 = {
> -            const WPR2_DOWN_ALIGN: Alignment = Alignment::new::<SZ_1M>();
> +            const WPR2_DOWN_ALIGN: Alignment = Alignment::SZ_1M;
>              let wpr2_addr = (wpr2_heap.start - u64::from_safe_cast(size_of::<gsp::GspFwWprMeta>()))
>                  .align_down(WPR2_DOWN_ALIGN);
>  
> diff --git a/drivers/gpu/nova-core/fb/hal/gb100.rs b/drivers/gpu/nova-core/fb/hal/gb100.rs
> index 612f70333c11..37b2ae762df4 100644
> --- a/drivers/gpu/nova-core/fb/hal/gb100.rs
> +++ b/drivers/gpu/nova-core/fb/hal/gb100.rs
> @@ -80,7 +80,7 @@ fn write_sysmem_flush_page_gb100(hshub0: Mmio<'_, regs::Hshub0Registers>, addr:
>  
>  // This PMU reservation size is r570-specific.
>  pub(super) const fn pmu_reserved_size_gb100() -> u32 {
> -    cv!(const_align_up(SZ_8M + SZ_16M + SZ_4K, Alignment::new::<SZ_128K>()).unwrap())
> +    cv!(const_align_up(SZ_8M + SZ_16M + SZ_4K, Alignment::SZ_128K).unwrap())
>  }
>  
>  impl FbHal for Gb100 {
> diff --git a/drivers/gpu/nova-core/fsp.rs b/drivers/gpu/nova-core/fsp.rs
> index 3a4a10487f33..637a00b2c951 100644
> --- a/drivers/gpu/nova-core/fsp.rs
> +++ b/drivers/gpu/nova-core/fsp.rs
> @@ -20,7 +20,7 @@
>          Alignable,
>          Alignment, //
>      },
> -    sizes::SZ_2M,
> +    sizes::SizeConstants,
>      time::Delta,
>      transmute::{
>          AsBytes,
> @@ -259,7 +259,7 @@ fn frts_vidmem_offset(hal: &dyn hal::FspHal, fb_info: &FbSizes) -> Result<u64> {
>          if fb_info.pmu_reserved_size != 0 {
>              offset = (offset + u64::from(fb_info.pmu_reserved_size))
>                  // The 2 MiB alignment is r570-specific.
> -                .align_up(Alignment::new::<SZ_2M>())
> +                .align_up(Alignment::SZ_2M)
>                  .ok_or(EINVAL)?;
>          }
>  
> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
> index ac5305d7ff5e..d185e927233f 100644
> --- a/drivers/gpu/nova-core/gpu.rs
> +++ b/drivers/gpu/nova-core/gpu.rs
> @@ -12,10 +12,7 @@
>      pci,
>      prelude::*,
>      ptr::Alignment,
> -    sizes::{
> -        SizeConstants,
> -        SZ_4K, //
> -    },
> +    sizes::SizeConstants,
>      uapi, //
>  };
>  
> @@ -568,7 +565,7 @@ pub(crate) fn new<'a>(
>                  let buddy_params = GpuBuddyParams {
>                      base_offset: usable_vram.start,
>                      size: usable_vram.end - usable_vram.start,
> -                    chunk_size: Alignment::new::<SZ_4K>(),
> +                    chunk_size: Alignment::SZ_4K,
>                  };
>  
>                  GpuMm::new(
> diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
> index 75b98f24dea1..5c216d777dff 100644
> --- a/drivers/gpu/nova-core/gsp/fw.rs
> +++ b/drivers/gpu/nova-core/gsp/fw.rs
> @@ -26,10 +26,7 @@
>          Alignment,
>          KnownSize, //
>      },
> -    sizes::{
> -        SizeConstants,
> -        SZ_128K, //
> -    },
> +    sizes::SizeConstants,
>      transmute::{
>          AsBytes,
>          FromBytes, //
> @@ -65,7 +62,7 @@
>  enum GspFwHeapParams {}
>  
>  /// Minimum required alignment for the GSP heap.
> -const GSP_HEAP_ALIGNMENT: Alignment = Alignment::new::<{ 1 << 20 }>();
> +const GSP_HEAP_ALIGNMENT: Alignment = Alignment::SZ_1M;
>  
>  impl GspFwHeapParams {
>      /// Returns the amount of GSP-RM heap memory used during GSP-RM boot and initialization (up to
> @@ -209,10 +206,7 @@ pub(crate) fn from_ranges<'a>(
>              bootBinOffset: ranges.boot.start,
>              frtsOffset: ranges.frts.start,
>              frtsSize: ranges.frts.len(),
> -            gspFwWprEnd: ranges
> -                .vga_workspace
> -                .start
> -                .align_down(Alignment::new::<SZ_128K>()),
> +            gspFwWprEnd: ranges.vga_workspace.start.align_down(Alignment::SZ_128K),
>              gspFwHeapVfPartitionCount: ranges.vf_partition_count,
>              fbSize: ranges.fb.len(),
>              vgaWorkspaceOffset: ranges.vga_workspace.start,
> diff --git a/drivers/gpu/nova-core/mm.rs b/drivers/gpu/nova-core/mm.rs
> index 8a934c55169f..f53886f9ed91 100644
> --- a/drivers/gpu/nova-core/mm.rs
> +++ b/drivers/gpu/nova-core/mm.rs
> @@ -317,7 +317,7 @@ pub(crate) fn run(
>  
>          let base = usable_fb_regions.iter().find_map(|region| {
>              // Tests rely on this being 8 byte aligned for checking misalignment handling.
> -            let base = region.start.align_up(Alignment::new::<8>())?;
> +            let base = region.start.align_up(Alignment::SZ_8)?;
>              (base.checked_add(SELFTEST_SPAN)? <= region.end).then_some(base)
>          });
>          let Some(base) = base else {
> diff --git a/drivers/gpu/nova-core/mm/bar_user.rs b/drivers/gpu/nova-core/mm/bar_user.rs
> index 6e9384f06f43..2e8bd2a8ed91 100644
> --- a/drivers/gpu/nova-core/mm/bar_user.rs
> +++ b/drivers/gpu/nova-core/mm/bar_user.rs
> @@ -195,6 +195,7 @@ pub(crate) fn run_self_test(
>          },
>          ptr::Alignment,
>          sizes::{
> +            SizeConstants,
>              SZ_16K,
>              SZ_32K,
>              SZ_4K,
> @@ -222,7 +223,7 @@ pub(crate) fn run_self_test(
>          mm.buddy().alloc_blocks(
>              GpuBuddyAllocMode::Simple,
>              SZ_4K.into_safe_cast(),
> -            Alignment::new::<SZ_4K>(),
> +            Alignment::SZ_4K,
>              GpuBuddyAllocFlags::default(),
>          ),
>          GFP_KERNEL,
> @@ -299,7 +300,7 @@ pub(crate) fn run_self_test(
>          mm.buddy().alloc_blocks(
>              GpuBuddyAllocMode::Range(range_base + sz_16k..range_base + sz_16k + sz_4k),
>              SZ_4K.into_safe_cast(),
> -            Alignment::new::<SZ_4K>(),
> +            Alignment::SZ_4K,
>              GpuBuddyAllocFlags::default(),
>          ),
>          GFP_KERNEL,
> @@ -311,7 +312,7 @@ pub(crate) fn run_self_test(
>          mm.buddy().alloc_blocks(
>              GpuBuddyAllocMode::Range(range_base..range_base + sz_32k_4k),
>              SZ_32K.into_safe_cast(),
> -            Alignment::new::<SZ_4K>(),
> +            Alignment::SZ_4K,
>              GpuBuddyAllocFlags::default(),
>          ),
>          GFP_KERNEL,
> diff --git a/drivers/gpu/nova-core/mm/pagetable/map.rs b/drivers/gpu/nova-core/mm/pagetable/map.rs
> index 77431c509a89..f7774b9cc972 100644
> --- a/drivers/gpu/nova-core/mm/pagetable/map.rs
> +++ b/drivers/gpu/nova-core/mm/pagetable/map.rs
> @@ -17,7 +17,10 @@
>          RBTree,
>          RBTreeNode, //
>      },
> -    sizes::SZ_4K, //
> +    sizes::{
> +        SizeConstants,
> +        SZ_4K, //
> +    }, //
>  };
>  
>  use super::{
> @@ -84,7 +87,7 @@ fn alloc_and_zero_page(mm: &mut GpuMm<'_>, level: PageTableLevel) -> Result<Prep
>              mm.buddy().alloc_blocks(
>                  GpuBuddyAllocMode::Simple,
>                  SZ_4K.into_safe_cast(),
> -                Alignment::new::<SZ_4K>(),
> +                Alignment::SZ_4K,
>                  GpuBuddyAllocFlags::default(),
>              ),
>              GFP_KERNEL,
> diff --git a/drivers/gpu/nova-core/mm/pramin.rs b/drivers/gpu/nova-core/mm/pramin.rs
> index 7f89c093d591..c83b1681d241 100644
> --- a/drivers/gpu/nova-core/mm/pramin.rs
> +++ b/drivers/gpu/nova-core/mm/pramin.rs
> @@ -19,8 +19,8 @@
>          Alignment, //
>      },
>      sizes::{
> -        SZ_1M,
> -        SZ_64K, //
> +        SizeConstants,
> +        SZ_1M, //
>      },
>  };
>  
> @@ -103,7 +103,7 @@ fn drop(&mut self) {
>  
>  impl<'gpu> Pramin<'gpu> {
>      /// Alignment required by the PRAMIN window.
> -    const BASE_ALIGN: Alignment = Alignment::new::<SZ_64K>();
> +    const BASE_ALIGN: Alignment = Alignment::SZ_64K;
>  
>      /// Creates the window manager for the given VRAM region.
>      pub(super) fn new(
> diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs
> index 9c214b9f4dd9..a2d2d170b501 100644
> --- a/drivers/gpu/nova-core/vbios.rs
> +++ b/drivers/gpu/nova-core/vbios.rs
> @@ -11,7 +11,10 @@
>          Alignment, //
>      },
>      register,
> -    sizes::SZ_4K,
> +    sizes::{
> +        SizeConstants,
> +        SZ_4K, //
> +    },
>      sync::aref::ARef,
>  };
>  
> @@ -291,7 +294,7 @@ fn next(&mut self) -> Option<Self::Item> {
>  
>          // Advance to next image (aligned to 512 bytes).
>          self.current_offset += image_size;
> -        self.current_offset = self.current_offset.align_up(Alignment::new::<512>())?;
> +        self.current_offset = self.current_offset.align_up(Alignment::SZ_512)?;
>  
>          Some(Ok(full_image))
>      }
> 
> -- 
> 2.56.0
> 

  parent reply	other threads:[~2026-11-10 17:22 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-09  8:32 [PATCH v11 0/5] rust: Add support for reserving of ranges of IDs Eliot Courtney
2026-11-09  8:32 ` [PATCH v11 1/5] rust: io: use Alignment size constants Eliot Courtney
2026-11-09 12:37   ` Gary Guo
2026-11-10 17:17   ` Yury Norov
2026-11-09  8:32 ` [PATCH v11 2/5] rust: gpu: buddy: " Eliot Courtney
2026-11-09 12:37   ` Gary Guo
2026-11-10 17:21   ` Yury Norov
2026-11-09  8:32 ` [PATCH v11 3/5] gpu: nova-core: " Eliot Courtney
2026-11-09 12:37   ` Gary Guo
2026-11-10 17:22   ` Yury Norov [this message]
2026-11-09  8:32 ` [PATCH v11 4/5] rust: id_pool: do not round capacity up to BitmapVec::MAX_INLINE_LEN Eliot Courtney
2026-11-09 12:08   ` Alexandre Courbot
2026-11-09 12:36   ` Gary Guo
2026-11-10  7:29     ` Eliot Courtney
2026-11-10 17:42   ` Yury Norov
2026-11-09  8:32 ` [PATCH v11 5/5] gpu: nova-core: add ChannelIdPool Eliot Courtney
2026-11-09 21:21 ` (subset) [PATCH v11 0/5] rust: Add support for reserving of ranges of IDs Danilo Krummrich
2026-11-09 21:33 ` Danilo Krummrich

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