Re: [PATCH v12 0/6] Enable ICE clock scaling

[Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>]

On Mon, Aug 24, 2026 at 01:17:37AM +0530, Abhinaba Rakshit wrote:
> Introduce support for dynamic clock scaling of the ICE (Inline Crypto Engine)
> using the OPP framework. During ICE device probe, the driver now attempts to
> parse an optional OPP table from the ICE-specific device tree node for 
> DVFS-aware operations. API qcom_ice_scale_clk is exposed by ICE driver
> and is invoked by UFS host controller driver in response to clock scaling
> requests, ensuring coordination between ICE and host controller.
> 
> For MMC controllers that do not support clock scaling, the ICE clock frequency
> is kept aligned with the MMC controller’s clock rate (TURBO) to ensure
> consistent operation.
> 
> Dynamic clock scaling based on OPP tables enables better power-performance
> trade-offs. By adjusting ICE clock frequencies according to workload and power
> constraints, the system can achieve higher throughput when needed and 
> reduce power consumption during idle or low-load conditions.
> 
> The OPP table remains optional, absence of the table will not cause
> probe failure. However, in the absence of an OPP table, ICE clocks will
> remain at their default rates, which may limit performance under
> high-load scenarios or prevent performance optimizations during idle periods.
> 
> Testing:
> * dtbs_check
> * Validated on Rb3Gen2, qcs8300-ride-sx and LeMans-evk
> 
> Merge Order and Dependencies
> ============================
> 
> Patch 2 is dependent on patch 1 for the qcom_ice_scale_clk() API to be available.
> Patch 3 is dependent on patch 1 for the qcom_ice_scale_clk() API to be available.
> 
> Due to dependency, all patches should go through Qcom SoC tree.
> 
> This patchset supersedes earlier ICE clock scaling series (v1–v11) with updated dependencies.
> Hence, this patchset also *Depends-On* the following patchseries:
> 
> [1] Enable sdhc inline crypto engine for kodiak and monaco
>     https://lore.kernel.org/all/20260707-ice_emmc_support-v9-0-701c86f3c25b@oss.qualcomm.com/
> 
> Similar to patchset v11, patchset v12 is rebased on top of latest changes picked onto linux-next.
> 
> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>

Hello Bjorn,

This series has been posted for a while now and I don't see any outstanding review comments on it.
Could you pick it up into your tree for next RC?

Although the series reads as a feature enablement, it's addressing a real regression: on several chipsets,
turning on the Inline Crypto Engine today causes a significant storage throughput drop without this
series applied.

For example:
Without ICE:         Sequential Read:  220 MB/s,     Sequential Write: 310 MB/s
With ICE enabled:    Sequential Read:  143.717 MB/s, Sequential Write: 126.762 MB/s

That's roughly a 35-60% drop in throughput (averaging ~50%). This series is what makes ICE usable without
that penalty, so merging it would let anyone enabling ICE today actually get the performance it's meant
to provide.

Abhinaba Rakshit