* [RFC PATCH 1/2] usb: gadget: fsl_udc: Add support for zynq usb device controller [not found] <1398011009-10978-1-git-send-email-punnaia@xilinx.com> @ 2014-04-20 16:23 ` Punnaiah Choudary Kalluri 2014-04-20 16:23 ` [RFC PATCH 2/2] usb: ehci-fsl: Add support for zynq usb host controller Punnaiah Choudary Kalluri 1 sibling, 0 replies; 3+ messages in thread From: Punnaiah Choudary Kalluri @ 2014-04-20 16:23 UTC (permalink / raw) To: leoli, balbi, michal.simek Cc: linux-kernel, linuxppc-dev, linux-arm-kernel, linux-usb, Punnaiah Choudary Kalluri Since zynq soc usb controller is a synopsys IP and there is a driver available for this controller from freescale in opensource, reusing this driver for zynq use. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> --- drivers/usb/gadget/Kconfig | 2 +- drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/fsl_mxc_udc.c | 21 +++++++++++++++++++++ drivers/usb/gadget/fsl_udc_core.c | 5 +++++ drivers/usb/gadget/fsl_usb2_udc.h | 2 +- drivers/usb/host/fsl-mph-dr-of.c | 9 +++++++++ 6 files changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 3557c7e..7f18ab47 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -186,7 +186,7 @@ config USB_BCM63XX_UDC config USB_FSL_USB2 tristate "Freescale Highspeed USB DR Peripheral Controller" - depends on FSL_SOC || ARCH_MXC + depends on FSL_SOC || ARCH_MXC || ARCH_ZYNQ select USB_FSL_MPH_DR_OF if OF help Some of Freescale PowerPC and i.MX processors have a High Speed diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 5f150bc..38b009f 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_USB_BCM63XX_UDC) += bcm63xx_udc.o obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o fsl_usb2_udc-y := fsl_udc_core.o fsl_usb2_udc-$(CONFIG_ARCH_MXC) += fsl_mxc_udc.o +fsl_usb2_udc-$(CONFIG_ARCH_ZYNQ) += fsl_mxc_udc.o obj-$(CONFIG_USB_M66592) += m66592-udc.o obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c index 9b140fc..181245c 100644 --- a/drivers/usb/gadget/fsl_mxc_udc.c +++ b/drivers/usb/gadget/fsl_mxc_udc.c @@ -19,8 +19,10 @@ #include <linux/io.h> static struct clk *mxc_ahb_clk; +#ifndef CONFIG_ARCH_ZYNQ static struct clk *mxc_per_clk; static struct clk *mxc_ipg_clk; +#endif /* workaround ENGcm09152 for i.MX35 */ #define MX35_USBPHYCTRL_OFFSET 0x600 @@ -30,6 +32,7 @@ static struct clk *mxc_ipg_clk; int fsl_udc_clk_init(struct platform_device *pdev) { struct fsl_usb2_platform_data *pdata; +#ifndef CONFIG_ARCH_ZYNQ unsigned long freq; int ret; @@ -76,10 +79,21 @@ eclkrate: clk_disable_unprepare(mxc_per_clk); mxc_per_clk = NULL; return ret; +#else + pdata = dev_get_platdata(&pdev->dev); + mxc_ahb_clk = devm_clk_get(pdev->dev.parent, NULL); + if (IS_ERR(mxc_ahb_clk)) + return PTR_ERR(mxc_ahb_clk); + + clk_prepare_enable(mxc_ahb_clk); + + return 0; +#endif } int fsl_udc_clk_finalize(struct platform_device *pdev) { +#ifndef CONFIG_ARCH_ZYNQ struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); int ret = 0; @@ -112,12 +126,19 @@ ioremap_err: } return ret; +#else + return 0; +#endif } void fsl_udc_clk_release(void) { +#ifndef CONFIG_ARCH_ZYNQ if (mxc_per_clk) clk_disable_unprepare(mxc_per_clk); clk_disable_unprepare(mxc_ahb_clk); clk_disable_unprepare(mxc_ipg_clk); +#else + clk_disable_unprepare(mxc_ahb_clk); +#endif } diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c index 15960af..c3ff3fb 100644 --- a/drivers/usb/gadget/fsl_udc_core.c +++ b/drivers/usb/gadget/fsl_udc_core.c @@ -2492,6 +2492,9 @@ static int __init fsl_udc_probe(struct platform_device *pdev) goto err_free_irq; } +#ifdef CONFIG_ARCH_ZYNQ + udc_controller->vbus_active = 1; +#endif ret = usb_add_gadget_udc_release(&pdev->dev, &udc_controller->gadget, fsl_udc_release); if (ret) @@ -2661,8 +2664,10 @@ static const struct platform_device_id fsl_udc_devtype[] = { MODULE_DEVICE_TABLE(platform, fsl_udc_devtype); static struct platform_driver udc_driver = { .remove = __exit_p(fsl_udc_remove), +#ifndef CONFIG_ARCH_ZYNQ /* Just for FSL i.mx SoC currently */ .id_table = fsl_udc_devtype, +#endif /* these suspend and resume are not usb suspend and resume */ .suspend = fsl_udc_suspend, .resume = fsl_udc_resume, diff --git a/drivers/usb/gadget/fsl_usb2_udc.h b/drivers/usb/gadget/fsl_usb2_udc.h index c6703bb..6394138 100644 --- a/drivers/usb/gadget/fsl_usb2_udc.h +++ b/drivers/usb/gadget/fsl_usb2_udc.h @@ -590,7 +590,7 @@ static inline struct ep_queue_head *get_qh_by_ep(struct fsl_ep *ep) } struct platform_device; -#ifdef CONFIG_ARCH_MXC +#if defined CONFIG_ARCH_MXC || defined CONFIG_ARCH_ZYNQ int fsl_udc_clk_init(struct platform_device *pdev); int fsl_udc_clk_finalize(struct platform_device *pdev); void fsl_udc_clk_release(void); diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c index 9162d1b..7d89415 100644 --- a/drivers/usb/host/fsl-mph-dr-of.c +++ b/drivers/usb/host/fsl-mph-dr-of.c @@ -42,6 +42,10 @@ static struct fsl_usb2_dev_data dr_mode_data[] = { }, }; +#ifdef CONFIG_ARCH_ZYNQ +static u64 dma_mask = 0xFFFFFFF0; +#endif + static struct fsl_usb2_dev_data *get_dr_mode_data(struct device_node *np) { const unsigned char *prop; @@ -94,7 +98,11 @@ static struct platform_device *fsl_usb2_device_register( pdev->dev.parent = &ofdev->dev; pdev->dev.coherent_dma_mask = ofdev->dev.coherent_dma_mask; +#ifndef CONFIG_ARCH_ZYNQ *pdev->dev.dma_mask = *ofdev->dev.dma_mask; +#else + pdev->dev.dma_mask = &dma_mask; +#endif retval = platform_device_add_data(pdev, pdata, sizeof(*pdata)); if (retval) @@ -320,6 +328,7 @@ static const struct of_device_id fsl_usb2_mph_dr_of_match[] = { #ifdef CONFIG_PPC_MPC512x { .compatible = "fsl,mpc5121-usb2-dr", .data = &fsl_usb2_mpc5121_pd, }, #endif + { .compatible = "synopsys,usb2-dr-2.20a", }, {}, }; -- 1.7.4 ^ permalink raw reply [flat|nested] 3+ messages in thread
* [RFC PATCH 2/2] usb: ehci-fsl: Add support for zynq usb host controller [not found] <1398011009-10978-1-git-send-email-punnaia@xilinx.com> 2014-04-20 16:23 ` [RFC PATCH 1/2] usb: gadget: fsl_udc: Add support for zynq usb device controller Punnaiah Choudary Kalluri @ 2014-04-20 16:23 ` Punnaiah Choudary Kalluri 1 sibling, 0 replies; 3+ messages in thread From: Punnaiah Choudary Kalluri @ 2014-04-20 16:23 UTC (permalink / raw) To: leoli, balbi, michal.simek Cc: linux-kernel, linuxppc-dev, linux-arm-kernel, linux-usb, Punnaiah Choudary Kalluri Since zynq soc usb controller is a synopsys IP and there is a driver available for this controller from freescale in opensource, reusing this driver for zynq use. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> --- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-fsl.c | 63 ++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 3d9e540..295274e 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -117,7 +117,7 @@ config XPS_USB_HCD_XILINX config USB_EHCI_FSL bool "Support for Freescale PPC on-chip EHCI USB controller" - depends on FSL_SOC + depends on FSL_SOC || ARCH_ZYNQ select USB_EHCI_ROOT_HUB_TT select USB_FSL_MPH_DR_OF if OF ---help--- diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 6f2c8d3..54db34f 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -23,11 +23,13 @@ * Anton Vorontsov <avorontsov@ru.mvista.com>. */ +#include <linux/clk.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/delay.h> #include <linux/pm.h> #include <linux/err.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/fsl_devices.h> @@ -86,6 +88,15 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, } irq = res->start; +#ifdef CONFIG_ARCH_ZYNQ + pdata->clk = devm_clk_get(pdev->dev.parent, NULL); + if (IS_ERR(pdata->clk)) + return PTR_ERR(pdata->clk); + + retval = clk_prepare_enable(pdata->clk); + if (retval) + return retval; +#endif hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); if (!hcd) { retval = -ENOMEM; @@ -121,9 +132,11 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, goto err2; } +#ifdef CONFIG_FSL_SOC /* Enable USB controller, 83xx or 8536 */ if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); +#endif /* Don't need to set host mode here. It will be done by tdi_reset() */ @@ -159,6 +172,9 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, err2: usb_put_hcd(hcd); err1: +#ifdef CONFIG_ARCH_ZYNQ + clk_disable_unprepare(pdata->clk); +#endif dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); if (pdata->exit) pdata->exit(pdev); @@ -203,6 +219,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, { u32 portsc; struct ehci_hcd *ehci = hcd_to_ehci(hcd); +#ifdef CONFIG_FSL_SOC void __iomem *non_ehci = hcd->regs; struct device *dev = hcd->self.controller; struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); @@ -211,18 +228,21 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, dev_warn(hcd->self.controller, "Could not get controller version\n"); return -ENODEV; } +#endif portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); switch (phy_mode) { case FSL_USB2_PHY_ULPI: +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); setbits32(non_ehci + FSL_SOC_USB_CTRL, ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); } +#endif portsc |= PORT_PTS_ULPI; break; case FSL_USB2_PHY_SERIAL: @@ -232,6 +252,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, portsc |= PORT_PTS_PTW; /* fall through */ case FSL_USB2_PHY_UTMI: +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); @@ -242,12 +263,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, if (pdata->have_sysif_regs) setbits32(non_ehci + FSL_SOC_USB_CTRL, CTRL_UTMI_PHY_EN); +#endif portsc |= PORT_PTS_UTMI; break; case FSL_USB2_PHY_NONE: break; } +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver && (phy_mode == FSL_USB2_PHY_ULPI)) { /* check PHY_CLK_VALID to get phy clk valid */ @@ -258,11 +281,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, return -EINVAL; } } +#endif ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); +#ifdef CONFIG_FSL_SOC if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); +#endif return 0; } @@ -271,10 +297,13 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) { struct usb_hcd *hcd = ehci_to_hcd(ehci); struct fsl_usb2_platform_data *pdata; +#ifdef CONFIG_FSL_SOC void __iomem *non_ehci = hcd->regs; +#endif pdata = dev_get_platdata(hcd->self.controller); +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs) { /* * Turn on cache snooping hardware, since some PowerPC platforms @@ -287,6 +316,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) /* SNOOP2 starts from 0x80000000, size 2G */ out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); } +#endif if ((pdata->operating_mode == FSL_USB2_DR_HOST) || (pdata->operating_mode == FSL_USB2_DR_OTG)) @@ -294,6 +324,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) return -EINVAL; if (pdata->operating_mode == FSL_USB2_MPH_HOST) { +#ifdef CONFIG_FSL_SOC unsigned int chip, rev, svr; svr = mfspr(SPRN_SVR); @@ -304,6 +335,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) ehci->has_fsl_port_bug = 1; +#endif if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) return -EINVAL; @@ -313,6 +345,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) return -EINVAL; } +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs) { #ifdef CONFIG_FSL_SOC_BOOKE out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); @@ -323,6 +356,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) #endif out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); } +#endif return 0; } @@ -346,8 +380,10 @@ static int ehci_fsl_setup(struct usb_hcd *hcd) dev = hcd->self.controller; pdata = dev_get_platdata(hcd->self.controller); +#ifdef FSL_SOC ehci->big_endian_desc = pdata->big_endian_desc; ehci->big_endian_mmio = pdata->big_endian_mmio; +#endif /* EHCI registers start at offset 0x100 */ ehci->caps = hcd->regs + 0x100; @@ -537,18 +573,25 @@ static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev) } #endif /* CONFIG_PPC_MPC512x */ +#ifdef CONFIG_FSL_SOC static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) { struct ehci_hcd *ehci = hcd_to_ehci(hcd); return container_of(ehci, struct ehci_fsl, ehci); } +#endif static int ehci_fsl_drv_suspend(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); +#ifdef CONFIG_FSL_SOC struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); void __iomem *non_ehci = hcd->regs; +#endif +#ifdef CONFIG_ARCH_ZYNQ + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); +#endif if (of_device_is_compatible(dev->parent->of_node, "fsl,mpc5121-usb2-dr")) { @@ -557,33 +600,51 @@ static int ehci_fsl_drv_suspend(struct device *dev) ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), device_may_wakeup(dev)); +#ifdef CONFIG_FSL_SOC if (!fsl_deep_sleep()) return 0; ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); +#endif +#ifdef CONFIG_ARCH_ZYNQ + clk_disable(pdata->clk); +#endif return 0; } static int ehci_fsl_drv_resume(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); - struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); struct ehci_hcd *ehci = hcd_to_ehci(hcd); +#ifdef CONFIG_FSL_SOC + struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); void __iomem *non_ehci = hcd->regs; +#endif +#ifdef CONFIG_ARCH_ZYNQ + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); +#endif + if (of_device_is_compatible(dev->parent->of_node, "fsl,mpc5121-usb2-dr")) { return ehci_fsl_mpc512x_drv_resume(dev); } +#ifdef CONFIG_ARCH_ZYNQ + clk_disable(pdata->clk); +#endif ehci_prepare_ports_for_controller_resume(ehci); +#ifdef CONFIG_FSL_SOC if (!fsl_deep_sleep()) return 0; +#endif usb_root_hub_lost_power(hcd->self.root_hub); +#ifdef CONFIG_FSL_SOC /* Restore USB PHY settings and enable the controller. */ out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); +#endif ehci_reset(ehci); ehci_fsl_reinit(ehci); -- 1.7.4 ^ permalink raw reply [flat|nested] 3+ messages in thread
[parent not found: <1398011225-19835-1-git-send-email-punnaia@xilinx.com>]
* [RFC PATCH 2/2] usb: ehci-fsl: Add support for zynq usb host controller [not found] <1398011225-19835-1-git-send-email-punnaia@xilinx.com> @ 2014-04-20 16:27 ` Punnaiah Choudary Kalluri 0 siblings, 0 replies; 3+ messages in thread From: Punnaiah Choudary Kalluri @ 2014-04-20 16:27 UTC (permalink / raw) To: leoli, balbi, michal.simek Cc: linux-kernel, linuxppc-dev, linux-arm-kernel, linux-usb, kalluripunnaiahchoudary, kpc528, Punnaiah Choudary Kalluri Since zynq soc usb controller is a synopsys IP and there is a driver available for this controller from freescale in opensource, reusing this driver for zynq use. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> --- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-fsl.c | 63 ++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 3d9e540..295274e 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -117,7 +117,7 @@ config XPS_USB_HCD_XILINX config USB_EHCI_FSL bool "Support for Freescale PPC on-chip EHCI USB controller" - depends on FSL_SOC + depends on FSL_SOC || ARCH_ZYNQ select USB_EHCI_ROOT_HUB_TT select USB_FSL_MPH_DR_OF if OF ---help--- diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 6f2c8d3..54db34f 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -23,11 +23,13 @@ * Anton Vorontsov <avorontsov@ru.mvista.com>. */ +#include <linux/clk.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/delay.h> #include <linux/pm.h> #include <linux/err.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/fsl_devices.h> @@ -86,6 +88,15 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, } irq = res->start; +#ifdef CONFIG_ARCH_ZYNQ + pdata->clk = devm_clk_get(pdev->dev.parent, NULL); + if (IS_ERR(pdata->clk)) + return PTR_ERR(pdata->clk); + + retval = clk_prepare_enable(pdata->clk); + if (retval) + return retval; +#endif hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); if (!hcd) { retval = -ENOMEM; @@ -121,9 +132,11 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, goto err2; } +#ifdef CONFIG_FSL_SOC /* Enable USB controller, 83xx or 8536 */ if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); +#endif /* Don't need to set host mode here. It will be done by tdi_reset() */ @@ -159,6 +172,9 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, err2: usb_put_hcd(hcd); err1: +#ifdef CONFIG_ARCH_ZYNQ + clk_disable_unprepare(pdata->clk); +#endif dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); if (pdata->exit) pdata->exit(pdev); @@ -203,6 +219,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, { u32 portsc; struct ehci_hcd *ehci = hcd_to_ehci(hcd); +#ifdef CONFIG_FSL_SOC void __iomem *non_ehci = hcd->regs; struct device *dev = hcd->self.controller; struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); @@ -211,18 +228,21 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, dev_warn(hcd->self.controller, "Could not get controller version\n"); return -ENODEV; } +#endif portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); switch (phy_mode) { case FSL_USB2_PHY_ULPI: +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); setbits32(non_ehci + FSL_SOC_USB_CTRL, ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); } +#endif portsc |= PORT_PTS_ULPI; break; case FSL_USB2_PHY_SERIAL: @@ -232,6 +252,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, portsc |= PORT_PTS_PTW; /* fall through */ case FSL_USB2_PHY_UTMI: +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); @@ -242,12 +263,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, if (pdata->have_sysif_regs) setbits32(non_ehci + FSL_SOC_USB_CTRL, CTRL_UTMI_PHY_EN); +#endif portsc |= PORT_PTS_UTMI; break; case FSL_USB2_PHY_NONE: break; } +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs && pdata->controller_ver && (phy_mode == FSL_USB2_PHY_ULPI)) { /* check PHY_CLK_VALID to get phy clk valid */ @@ -258,11 +281,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, return -EINVAL; } } +#endif ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); +#ifdef CONFIG_FSL_SOC if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); +#endif return 0; } @@ -271,10 +297,13 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) { struct usb_hcd *hcd = ehci_to_hcd(ehci); struct fsl_usb2_platform_data *pdata; +#ifdef CONFIG_FSL_SOC void __iomem *non_ehci = hcd->regs; +#endif pdata = dev_get_platdata(hcd->self.controller); +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs) { /* * Turn on cache snooping hardware, since some PowerPC platforms @@ -287,6 +316,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) /* SNOOP2 starts from 0x80000000, size 2G */ out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); } +#endif if ((pdata->operating_mode == FSL_USB2_DR_HOST) || (pdata->operating_mode == FSL_USB2_DR_OTG)) @@ -294,6 +324,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) return -EINVAL; if (pdata->operating_mode == FSL_USB2_MPH_HOST) { +#ifdef CONFIG_FSL_SOC unsigned int chip, rev, svr; svr = mfspr(SPRN_SVR); @@ -304,6 +335,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) ehci->has_fsl_port_bug = 1; +#endif if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) return -EINVAL; @@ -313,6 +345,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) return -EINVAL; } +#ifdef CONFIG_FSL_SOC if (pdata->have_sysif_regs) { #ifdef CONFIG_FSL_SOC_BOOKE out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); @@ -323,6 +356,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci) #endif out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); } +#endif return 0; } @@ -346,8 +380,10 @@ static int ehci_fsl_setup(struct usb_hcd *hcd) dev = hcd->self.controller; pdata = dev_get_platdata(hcd->self.controller); +#ifdef FSL_SOC ehci->big_endian_desc = pdata->big_endian_desc; ehci->big_endian_mmio = pdata->big_endian_mmio; +#endif /* EHCI registers start at offset 0x100 */ ehci->caps = hcd->regs + 0x100; @@ -537,18 +573,25 @@ static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev) } #endif /* CONFIG_PPC_MPC512x */ +#ifdef CONFIG_FSL_SOC static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) { struct ehci_hcd *ehci = hcd_to_ehci(hcd); return container_of(ehci, struct ehci_fsl, ehci); } +#endif static int ehci_fsl_drv_suspend(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); +#ifdef CONFIG_FSL_SOC struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); void __iomem *non_ehci = hcd->regs; +#endif +#ifdef CONFIG_ARCH_ZYNQ + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); +#endif if (of_device_is_compatible(dev->parent->of_node, "fsl,mpc5121-usb2-dr")) { @@ -557,33 +600,51 @@ static int ehci_fsl_drv_suspend(struct device *dev) ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), device_may_wakeup(dev)); +#ifdef CONFIG_FSL_SOC if (!fsl_deep_sleep()) return 0; ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); +#endif +#ifdef CONFIG_ARCH_ZYNQ + clk_disable(pdata->clk); +#endif return 0; } static int ehci_fsl_drv_resume(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); - struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); struct ehci_hcd *ehci = hcd_to_ehci(hcd); +#ifdef CONFIG_FSL_SOC + struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); void __iomem *non_ehci = hcd->regs; +#endif +#ifdef CONFIG_ARCH_ZYNQ + struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev); +#endif + if (of_device_is_compatible(dev->parent->of_node, "fsl,mpc5121-usb2-dr")) { return ehci_fsl_mpc512x_drv_resume(dev); } +#ifdef CONFIG_ARCH_ZYNQ + clk_disable(pdata->clk); +#endif ehci_prepare_ports_for_controller_resume(ehci); +#ifdef CONFIG_FSL_SOC if (!fsl_deep_sleep()) return 0; +#endif usb_root_hub_lost_power(hcd->self.root_hub); +#ifdef CONFIG_FSL_SOC /* Restore USB PHY settings and enable the controller. */ out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); +#endif ehci_reset(ehci); ehci_fsl_reinit(ehci); -- 1.7.4 ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2014-04-20 16:27 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <1398011009-10978-1-git-send-email-punnaia@xilinx.com>
2014-04-20 16:23 ` [RFC PATCH 1/2] usb: gadget: fsl_udc: Add support for zynq usb device controller Punnaiah Choudary Kalluri
2014-04-20 16:23 ` [RFC PATCH 2/2] usb: ehci-fsl: Add support for zynq usb host controller Punnaiah Choudary Kalluri
[not found] <1398011225-19835-1-git-send-email-punnaia@xilinx.com>
2014-04-20 16:27 ` Punnaiah Choudary Kalluri
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®