Re: [PATCH v3 7/8] x86/sev: Allow the guest to configure interrupt vectors for the hypervisor

[Melody Wang <huibo.wang@amd.com>]

Hi all,

On 9/20/26 11:16 AM, Melody Wang wrote:
> The SVSM APIC protocol supports 5 API calls. SVSM_APIC_CONFIGURE_VECTOR
> (shortened to SVSM_APIC_CONFIG_VECTOR for brevity), call 4, provides for
> the guest to configure an interrupt vector which the guest allows and
> the hypervisor can use to signal interrupts for it.
> 
> Implement this call, and make the default interrupt setting permissive
> to allow all interrupts when detecting an SVSM and Alternate Injection
> is enabled.
> 
> Signed-off-by: Melody Wang <huibo.wang@amd.com>
> ---
>   arch/x86/boot/compressed/sev.c          | 24 ++++++++++++++++++++++++
>   arch/x86/boot/compressed/sev.h          |  7 +++++++
>   arch/x86/include/asm/sev.h              |  2 ++
>   drivers/firmware/efi/libstub/x86-stub.c |  2 ++
>   4 files changed, 35 insertions(+)
> 
> diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
> index 9f776ba7f123..6ab6276f731f 100644
> --- a/arch/x86/boot/compressed/sev.c
> +++ b/arch/x86/boot/compressed/sev.c
> @@ -534,3 +534,27 @@ void svsm_register_alt_inj(void)
>   			sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_ALT_INJ_FAIL);
>   	}
>   }
> +
> +/*
> + * Configure all interrupts as permissive by default for Alternate Injection
> + * enabled SNP guest.
> + */
> +void svsm_config_alt_inj_vectors(void)
> +{
> +	if (early_is_sevsnp_guest() && snp_vmpl) {
> +		struct svsm_call call = {};
> +		int ret;
> +
> +		if (!(sev_get_status() & MSR_AMD64_SNP_ALTERNATE_INJ))
> +			return;
> +
> +		call.caa = (struct svsm_ca *)boot_svsm_caa_pa;
> +		call.rax = SVSM_APIC_CALL(SVSM_APIC_CONFIG_VECTOR);
> +		call.rcx = SVSM_IRQ_ENABLE_ALL;
> +
> +		ret = svsm_call_msr_protocol(&call);
> +		if (ret)
> +			sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_ALT_INJ_FAIL);
> +	}
> +
> +}
> diff --git a/arch/x86/boot/compressed/sev.h b/arch/x86/boot/compressed/sev.h
> index dd058af2e7aa..035a7b46085b 100644
> --- a/arch/x86/boot/compressed/sev.h
> +++ b/arch/x86/boot/compressed/sev.h
> @@ -18,6 +18,13 @@ enum svsm_ai_ctrl {
>   	SVSM_AI_REGISTER,
>   };
>   
> +enum svsm_vec_enable {
> +	SVSM_IRQ_DISABLE_SINGLE = (0u << 8),
> +	SVSM_IRQ_ENABLE_SINGLE = (1u << 8),
> +	SVSM_IRQ_DISABLE_ALL = (2u << 8),
> +	SVSM_IRQ_ENABLE_ALL = (3u << 8),
> +};
> +
>   void snp_accept_memory(phys_addr_t start, phys_addr_t end);
>   u64 sev_get_status(void);
>   bool early_is_sevsnp_guest(void);
> diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
> index c1e31fc9c918..a6d4e5ea0913 100644
> --- a/arch/x86/include/asm/sev.h
> +++ b/arch/x86/include/asm/sev.h
> @@ -544,6 +544,7 @@ enum es_result savic_unregister_gpa(u64 *gpa);
>   u64 sev_apic_ghcb_msr_read(u32 reg);
>   void sev_apic_ghcb_msr_write(u32 reg, u64 value);
>   void svsm_register_alt_inj(void);
> +void svsm_config_alt_inj_vectors(void);
>   
>   static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)
>   {
> @@ -654,6 +655,7 @@ static inline enum es_result savic_unregister_gpa(u64 *gpa) { return ES_UNSUPPOR
>   static inline void sev_apic_ghcb_msr_write(u32 reg, u64 value) { }
>   static inline u64 sev_apic_ghcb_msr_read(u32 reg) { return 0; }
>   static inline void svsm_register_alt_inj(void) { }
> +static inline void svsm_config_alt_inj_vectors(void) { }
>   
>   #endif	/* CONFIG_AMD_MEM_ENCRYPT */
>   
> diff --git a/drivers/firmware/efi/libstub/x86-stub.c b/drivers/firmware/efi/libstub/x86-stub.c
> index 35b8641119b9..7082fa10d5e6 100644
> --- a/drivers/firmware/efi/libstub/x86-stub.c
> +++ b/drivers/firmware/efi/libstub/x86-stub.c
> @@ -796,6 +796,8 @@ static bool sev_prepare(void)
>   
>   	svsm_register_alt_inj();
>   
> +	svsm_config_alt_inj_vectors();
> +

Sashiko said this:

"Does this configuration need to happen for non-EFI direct boots as well?
Since svsm_register_alt_inj() and svsm_config_alt_inj_vectors() are
exclusively called from sev_prepare() inside the EFI stub, non-EFI direct
boots (e.g., passing the CC blob via find_cc_blob_setup_data()) will bypass
this code.
In a non-EFI boot, Alternate Injection is never registered with the SVSM.
However, svsm_apic_probe() will still successfully probe and enable 
svsm_apic
because MSR_AMD64_SNP_ALTERNATE_INJ remains set in the hardware status MSR
provided by SVSM.
Will this cause the first APIC operation by the kernel (e.g.,
svsm_apic_msr_write()) to be routed to SVSM, where the unregistered call is
rejected and triggers sev_es_terminate(SEV_TERM_SET_LINUX,
GHCB_TERM_ALT_INJ_FAIL), leading to a deterministic boot crash?"

Alternate Injection does not work without OVMF support so no need to 
handle the non-EFI direct kernel boots.

Thanks,
Melody

>   	return false;
>   }
>   

-- 
Thanks,
Melody