From: "Christophe Leroy (CS GROUP)" <chleroy@kernel.org>
To: Qiang Zhao <qiang.zhao@nxp.com>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
Paul Louvel <paul.louvel@bootlin.com>
Subject: [PATCH 1/2] soc: fsl: qe_ports_ic: Use generic I/O helper instead of specific powerPC ones
Date: Tue, 7 Jul 2026 16:58:14 +0200 [thread overview]
Message-ID: <b08f76c1d8ff864774246f1e2c2158c223c001be.1783435914.git.chleroy@kernel.org> (raw)
Use ioread32be() and iowrite32be() instead of in_be32() and out_be32()
to allow build on other platforms than powerPC.
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
---
drivers/soc/fsl/qe/qe_ports_ic.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c
index 9b0bba64e91e4..33ca1ddafe18c 100644
--- a/drivers/soc/fsl/qe/qe_ports_ic.c
+++ b/drivers/soc/fsl/qe/qe_ports_ic.c
@@ -23,36 +23,39 @@ struct qepic_data {
static void qepic_mask(struct irq_data *d)
{
struct qepic_data *data = irq_data_get_irq_chip_data(d);
+ u32 val = ioread32be(data->reg + CEPIMR);
- clrbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d)));
+ iowrite32be(val & ~(1 << (31 - irqd_to_hwirq(d))), data->reg + CEPIMR);
}
static void qepic_unmask(struct irq_data *d)
{
struct qepic_data *data = irq_data_get_irq_chip_data(d);
+ u32 val = ioread32be(data->reg + CEPIMR);
- setbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d)));
+ iowrite32be(val | 1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIMR);
}
static void qepic_end(struct irq_data *d)
{
struct qepic_data *data = irq_data_get_irq_chip_data(d);
- out_be32(data->reg + CEPIER, 1 << (31 - irqd_to_hwirq(d)));
+ iowrite32be(1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIER);
}
static int qepic_set_type(struct irq_data *d, unsigned int flow_type)
{
struct qepic_data *data = irq_data_get_irq_chip_data(d);
unsigned int vec = (unsigned int)irqd_to_hwirq(d);
+ u32 val = ioread32be(data->reg + CEPICR);
switch (flow_type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_FALLING:
- setbits32(data->reg + CEPICR, 1 << (31 - vec));
+ iowrite32be(val | 1 << (31 - vec), data->reg + CEPICR);
return 0;
case IRQ_TYPE_EDGE_BOTH:
case IRQ_TYPE_NONE:
- clrbits32(data->reg + CEPICR, 1 << (31 - vec));
+ iowrite32be(val & ~(1 << (31 - vec)), data->reg + CEPICR);
return 0;
}
return -EINVAL;
@@ -69,7 +72,7 @@ static struct irq_chip qepic = {
static int qepic_get_irq(struct irq_desc *desc)
{
struct qepic_data *data = irq_desc_get_handler_data(desc);
- u32 event = in_be32(data->reg + CEPIER);
+ u32 event = ioread32be(data->reg + CEPIER);
if (!event)
return -1;
--
2.54.0
next reply other threads:[~2026-07-07 14:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 14:58 Christophe Leroy (CS GROUP) [this message]
2026-07-07 15:00 ` [PATCH 2/2] powerpc: Move CONFIG_QE_GPIO to SoC Christophe Leroy (CS GROUP)
2026-07-27 10:19 ` [PATCH 1/2] soc: fsl: qe_ports_ic: Use generic I/O helper instead of specific powerPC ones Christophe Leroy (CS GROUP)
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