From: Christopher Covington <cov@codeaurora.org>
To: Will Deacon <will.deacon@arm.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>,
linux-kernel@vger.kernel.org, shankerd@codeaurora.org,
timur@codeaurora.org, Mark Langsdorf <mlangsdo@redhat.com>,
Mark Salter <msalter@redhat.com>, Jon Masters <jcm@redhat.com>,
Neil Leeder <nleeder@codeaurora.org>
Subject: Re: [PATCH v5 2/2] arm64: Work around Falkor erratum 1009
Date: Tue, 31 Jan 2017 11:17:03 -0500 [thread overview]
Message-ID: <b18c8e22-2de5-6cc9-08d2-6586dea4a4d3@codeaurora.org> (raw)
In-Reply-To: <20170131143843.GD22283@arm.com>
On 01/31/2017 09:38 AM, Will Deacon wrote:
> On Mon, Jan 30, 2017 at 06:08:17PM -0500, Christopher Covington wrote:
>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>> index deab52374119..fc434f421c7b 100644
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -36,9 +36,21 @@
>> * not. The macros handles invoking the asm with or without the
>> * register argument as appropriate.
>> */
>> -#define __TLBI_0(op, arg) asm ("tlbi " #op)
>> -#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0" : : "r" (arg))
>> -#define __TLBI_N(op, arg, n, ...) __TLBI_##n(op, arg)
>> +#define __TLBI_0(op, arg) asm volatile ("tlbi " #op "\n" \
>> + ALTERNATIVE("nop\n nop", \
>> + "dsb ish\n tlbi " #op, \
>> + ARM64_WORKAROUND_REPEAT_TLBI, \
>> + CONFIG_QCOM_FALKOR_ERRATUM_1009) \
>> + : : )
>> +
>> +#define __TLBI_1(op, arg) asm volatile ("tlbi " #op ", %0\n" \
>> + ALTERNATIVE("nop\n nop", \
>> + "dsb ish\n tlbi " #op ", %0", \
>> + ARM64_WORKAROUND_REPEAT_TLBI, \
>> + CONFIG_QCOM_FALKOR_ERRATUM_1009) \
>> + : : "r" (arg))
>> +
>
> Why are these now volatile? I asked the same question on the previous
> version but didn't get a response:
>
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/483579.html
D'oh! Will fix in v6. Sorry about that.
Cov
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code
Aurora Forum, a Linux Foundation Collaborative Project.
prev parent reply other threads:[~2017-01-31 16:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-30 23:08 [PATCH v5 1/2] arm64: Work around Falkor erratum 1003 Christopher Covington
2017-01-30 23:08 ` [PATCH v5 2/2] arm64: Work around Falkor erratum 1009 Christopher Covington
2017-01-31 12:42 ` Mark Rutland
2017-01-31 14:36 ` Will Deacon
2017-01-31 14:38 ` Will Deacon
2017-01-31 16:17 ` Christopher Covington [this message]
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