Re: Old microcode CPU matching issue - x86/microcode/intel: Refresh the revisions that determine old_microcode

[Sohil Mehta <sohil.mehta@intel.com>]

On 11/20/2025 9:29 AM, Sohil Mehta wrote:

> diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c
> index 23b13ffc6053..613860448855 100644
> --- a/arch/x86/kernel/cpu/match.c
> +++ b/arch/x86/kernel/cpu/match.c
> @@ -77,7 +77,7 @@ const struct x86_cpu_id *x86_match_cpu(const struct
> x86_cpu_id *match)
>  		    !(BIT(c->x86_stepping) & m->steppings))
>  			continue;
>  		if (m->platform_mask != X86_PLATFORM_ANY &&
> -		    !(BIT(c->x86_platform_id) & m->platform_mask))
> +		    !(c->x86_platform_id & m->platform_mask))
>  			continue;
>  		if (m->feature != X86_FEATURE_ANY && !cpu_has(c, m->feature))
>  			continue;
> 
> 
>> On 6.18 rc6 with a bit of debug logging added, still seeing the same
>>
>> [    0.000000] x86/CPU: microcode 0x721421856 is older than minimum 0x721421881
>> [    0.000000] x86/CPU: MATCH LIST DATA: family 0x6, model 0x8f, steppings 0x100
>> [    0.000000] x86/CPU: BOOT_CPU_DATA: family 0x6, model 0x8f, stepping 0x8
>> [    0.000000] x86/CPU: Running old microcode
>> [    3.404176] microcode: Current revision: 0x2b000620 <<<<< I do have 0x2b000643 on the system, but it didn’t give me a notice that it updated early now
>>
> 

The early loading probably gets affected because intel_get_platform_id()
relies on boot_cpu_data which isn't initialized when load_ucode_bsp() is
called very early.

As you are clearly not running on a 25 year old processor maybe comment
out the INTEL_PENTIUM_III_DESCHUTES check as below just for testing :)

diff --git a/arch/x86/include/asm/microcode.h
b/arch/x86/include/asm/microcode.h
index 6ec2d78c78f0..c1950902a593 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -81,8 +81,8 @@ static inline u32 intel_get_platform_id(void)
 {
 	unsigned int val[2];

-	if (boot_cpu_data.x86_vfm < INTEL_PENTIUM_III_DESCHUTES)
-		return 0;
+	// if (boot_cpu_data.x86_vfm < INTEL_PENTIUM_III_DESCHUTES)
+	//	return 0;

 	/* get processor flags from MSR 0x17 */
 	native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);

Both my suggestions are mainly to unblock your testing. An upstreamable
fix would need some additional rework.

>> This was on this proc:
>> smpboot: CPU0: Intel(R) Xeon(R) Gold 5416S (family: 0x6, model: 0x8f, stepping: 0x8)