From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: me@fromdisposition.org, Krzysztof Kozlowski <krzk@kernel.org>,
Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8350: Add CPU and LLCC BWMON
Date: Fri, 16 Oct 2026 10:41:38 +0200 [thread overview]
Message-ID: <b46cd925-25b2-4e32-a878-10ace8561a5c@oss.qualcomm.com> (raw)
In-Reply-To: <20261016-sm8350-bwmon-v1-2-562fe403bf6b@fromdisposition.org>
On 10/16/26 8:13 AM, Demeter Barna via B4 Relay wrote:
> From: Demeter Barna <me@fromdisposition.org>
>
> Add the CPU-to-LLCC and LLCC-to-DDR bandwidth monitors, so that the
> interconnect votes follow the measured memory traffic.
>
> The levels are those of the downstream llcc-bw-opp-table and
> ddr-bw-opp-table. Downstream limits two DDR levels (5161 and 8136 MB/s)
> to LPDDR4X; leave them out, as was done for SM8250.
>
> Assisted-by: LLM
> Signed-off-by: Demeter Barna <me@fromdisposition.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
prev parent reply other threads:[~2026-10-16 8:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 6:13 [PATCH 0/2] " Demeter Barna via B4 Relay
2026-10-16 6:13 ` [PATCH 1/2] dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM8350 " Demeter Barna via B4 Relay
2026-10-16 6:13 ` [PATCH 2/2] arm64: dts: qcom: sm8350: Add " Demeter Barna via B4 Relay
2026-10-16 8:41 ` Konrad Dybcio [this message]
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