From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: <pbonzini@redhat.com>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <chao.gao@intel.com>
Subject: Re: [PATCH v2 01/16] KVM: x86: Rename register accessors to be GPR-specific
Date: Fri, 6 Mar 2026 17:32:20 -0800 [thread overview]
Message-ID: <b5b9efce-9205-4282-acc2-380d348c4f50@intel.com> (raw)
In-Reply-To: <aajd6Fa8gHz6lW78@google.com>
On 3/4/2026 5:35 PM, Sean Christopherson wrote:
> On Mon, Jan 12, 2026, Chang S. Bae wrote:
>> Refactor the VCPU register state accessors to make them explicitly
>> GPR-only.
>
> I like "register" though.
Yeah, agree that it is more general.
>
>> The existing register accessors operate on the cached VCPU register
>> state. That cache holds GPRs and RIP. RIP has its own interface already.
>
> Isn't it possible that e.g. get_vmx_mem_address() will do kvm_register_read()
> for a RIP-relative address? One could RIP isn't a pure GPR, but it's also not
> something entirely different either.
The 'reg' argument has historically matched the index of the register
cache array, vcpu::arch::regs[]. When extending the accessors to support
EGPRs, it looked smooth to keep using it as a register ID, since that
wires up cleanly with VMX instruction info and emulator sites. But then
reg=16 immediately conflicts with RIP.
Separating accessors for RIP and GPRs was an option. Yes, the usages are
very close and EGPRs are strictly not *legacy* GPRs.
Then, another option would be adjust RIP numbering. For example, use
something like VCPU_REGS_RIP=32 for the accessor, while keeping a
separate value like __VCPU_REGS_RIP=16 for the reg cache index. But
there are many sites directly referencing regs[] and the change looked
rather ugly -- two numberings for RIP alone.
Thoughts?
next prev parent reply other threads:[~2026-03-07 1:32 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-12 23:53 [PATCH v2 00/16] KVM: x86: Enable APX for guests Chang S. Bae
2026-01-12 23:53 ` [PATCH v2 01/16] KVM: x86: Rename register accessors to be GPR-specific Chang S. Bae
2026-03-05 1:35 ` Sean Christopherson
2026-03-07 1:32 ` Chang S. Bae [this message]
2026-03-09 23:28 ` Chang S. Bae
2026-03-10 1:23 ` Sean Christopherson
2026-03-10 22:05 ` Chang S. Bae
2026-03-10 23:12 ` Sean Christopherson
2026-01-12 23:53 ` [PATCH v2 02/16] KVM: x86: Refactor GPR accessors to differentiate register access types Chang S. Bae
2026-03-05 1:49 ` Sean Christopherson
2026-03-07 1:32 ` Chang S. Bae
2026-01-12 23:53 ` [PATCH v2 03/16] KVM: x86: Implement accessors for extended GPRs Chang S. Bae
2026-03-05 1:41 ` Sean Christopherson
2026-03-07 1:32 ` Chang S. Bae
2026-01-12 23:53 ` [PATCH v2 04/16] KVM: VMX: Introduce unified instruction info structure Chang S. Bae
2026-03-05 4:21 ` Sean Christopherson
2026-03-07 1:33 ` Chang S. Bae
2026-03-13 1:05 ` Sean Christopherson
2026-01-12 23:53 ` [PATCH v2 05/16] KVM: VMX: Refactor instruction information retrieval Chang S. Bae
2026-01-12 23:53 ` [PATCH v2 06/16] KVM: VMX: Refactor GPR index retrieval from exit qualification Chang S. Bae
2026-03-05 4:13 ` Sean Christopherson
2026-01-12 23:53 ` [PATCH v2 07/16] KVM: VMX: Support extended register index in exit handling Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 08/16] KVM: nVMX: Propagate the extended instruction info field Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 09/16] KVM: emulate: Support EGPR accessing and tracking Chang S. Bae
2026-03-05 4:22 ` Sean Christopherson
2026-01-12 23:54 ` [PATCH v2 10/16] KVM: emulate: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 11/16] KVM: emulate: Support REX2-prefixed opcode decode Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 12/16] KVM: emulate: Reject EVEX-prefixed instructions Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 13/16] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 14/16] KVM: x86: Expose APX foundational feature bit to guests Chang S. Bae
2026-01-19 5:55 ` Xiaoyao Li
2026-01-20 18:07 ` Edgecombe, Rick P
2026-01-20 20:50 ` Chang S. Bae
2026-01-21 19:59 ` Edgecombe, Rick P
2026-01-12 23:54 ` [PATCH v2 15/16] KVM: x86: Expose APX sub-features " Chang S. Bae
2026-01-12 23:54 ` [PATCH v2 16/16] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
2026-03-05 4:28 ` Sean Christopherson
2026-03-07 1:33 ` Chang S. Bae
2026-03-11 18:42 ` Paolo Bonzini
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