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From: Yijie Yang <yijie.yang@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Rob Clark <robin.clark@oss.qualcomm.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Joerg Roedel (AMD)" <joro@8bytes.org>
Cc: iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] iommu/qcom: Invalidate the TLB in flush_iotlb_all
Date: Tue, 10 Nov 2026 15:13:07 +0800	[thread overview]
Message-ID: <b75ff010-305a-492a-bd16-b27fb8a4e064@oss.qualcomm.com> (raw)
In-Reply-To: <20261031-msm-smmu-identity-v1-1-a2a70580eebd@oss.qualcomm.com>



On 10/31/2026 6:04 AM, Dmitry Baryshkov wrote:
> qcom_iommu_flush_iotlb_all() only waits for a TLB sync and never
> invalidates anything. iommu_unmap() users do not notice, since
> io-pgtable invalidates each page through the gather, but drm/msm unmaps
> with a NULL gather and relies on flush_iotlb_all. On db410c the GPU then
> hangs on stale TLB entries as soon as another process reuses the IOVAs.
> 
> Invalidate the whole context, as arm-smmu does, and keep iotlb_sync a
> plain sync.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>   drivers/iommu/arm/arm-smmu/qcom_iommu.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> index 21d18ce67b98..54130c32056a 100644
> --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> @@ -479,14 +479,22 @@ static void qcom_iommu_flush_iotlb_all(struct iommu_domain *domain)
>   		return;
>   
>   	pm_runtime_get_sync(qcom_domain->iommu->dev);
> -	qcom_iommu_tlb_sync(pgtable->cookie);
> +	qcom_iommu_tlb_inv_context(pgtable->cookie);
>   	pm_runtime_put_sync(qcom_domain->iommu->dev);
>   }
>   
>   static void qcom_iommu_iotlb_sync(struct iommu_domain *domain,
>   				  struct iommu_iotlb_gather *gather)
>   {
> -	qcom_iommu_flush_iotlb_all(domain);
> +	struct qcom_iommu_domain *qcom_domain = to_qcom_iommu_domain(domain);
> +	struct io_pgtable *pgtable = container_of(qcom_domain->pgtbl_ops,
> +						  struct io_pgtable, ops);
> +	if (!qcom_domain->pgtbl_ops)
> +		return;
> +
> +	pm_runtime_get_sync(qcom_domain->iommu->dev);
> +	qcom_iommu_tlb_sync(pgtable->cookie);
Optional cleanup: pgtable->cookie is already qcom_domain. Could both 
callbacks pass it directly to the TLB helpers and drop the pgtable 
variable and container_of() lookup?

> +	pm_runtime_put_sync(qcom_domain->iommu->dev);
>   }
>   
>   static phys_addr_t qcom_iommu_iova_to_phys(struct iommu_domain *domain,
> 

-- 
Best Regards,
Yijie


  parent reply	other threads:[~2026-11-10  7:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-30 22:04 [PATCH 0/3] iommu: qcom: Fix the MSM GPU and display with DMA-address based mappings Dmitry Baryshkov
2026-10-30 22:04 ` [PATCH 1/3] iommu/qcom: Invalidate the TLB in flush_iotlb_all Dmitry Baryshkov
2026-10-31 15:27   ` Rob Clark
2026-11-02  9:52   ` Konrad Dybcio
2026-11-10  7:13   ` Yijie Yang [this message]
2026-10-30 22:04 ` [PATCH 2/3] iommu/qcom: Use identity default domains for the MSM GPU and display Dmitry Baryshkov
2026-10-31 15:28   ` Rob Clark
2026-11-02  9:46   ` Konrad Dybcio
2026-10-30 22:04 ` [PATCH 3/3] iommu/arm-smmu-qcom: Use identity default domains for MDP5 Dmitry Baryshkov
2026-10-31 15:28   ` Rob Clark
2026-11-02  9:47   ` Konrad Dybcio
2026-10-31 15:33 ` [PATCH 0/3] iommu: qcom: Fix the MSM GPU and display with DMA-address based mappings Rob Clark
2026-11-02  9:58   ` Dmitry Baryshkov
2026-11-02 21:55     ` Rob Clark

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