RE: [PATCH net-next v1 1/2] net: phy: realtek: add support for RTL8261

[Javen <javen_xu@realsil.com.cn>]

>
>> > +static int rtl8261x_config_master_slave(struct phy_device *phydev)
>> > +{
>> > +   u16 val;
>> > +   /*
>> > +    * Configure bits 15:14 of MMD 7.0x0020
>> > +    *
>> > +    * Bit 15 (Enable) | Bit 14 (Value) | Mode
>> > +    * ----------------|----------------|-------------
>> > +    *       0         |       0        | Auto (disabled)
>> > +    *       1         |       0        | Force Slave
>> > +    *       1         |       1        | Force Master
>> > +    */
>> > +   switch (phydev->master_slave_set) {
>> > +   case MASTER_SLAVE_CFG_MASTER_FORCE:
>> > +           val = RTL8261X_MS_MASTER;
>> > +           break;
>> > +   case MASTER_SLAVE_CFG_SLAVE_FORCE:
>> > +           val = RTL8261X_MS_SLAVE;
>> > +           break;
>> > +   case MASTER_SLAVE_CFG_UNKNOWN:
>> > +   case MASTER_SLAVE_CFG_MASTER_PREFERRED:
>> > +   case MASTER_SLAVE_CFG_SLAVE_PREFERRED:
>> > +   default:
>> > +           val = RTL8261X_MS_AUTO;
>> > +           break;
>> > +   }
>> > +
>> > +   return phy_modify_mmd(phydev, MDIO_MMD_AN,
>RTL8261X_MULTIG_CTRL,
>> > +                         RTL8261X_MASTER_SLAVE_MASK, val); }
>>
>> RTL8261X_MULTIG_CTRL is a IEEE-defined register, so it can use
>> MDIO_AN_10GBT_CTRL instead.
>> Also the define for RTL8261X_MULTIG_CTRL can be dropped.
>>
>> While at it I would suggest to add MDIO_AN_10GBT_CTRL_MS_ENABLE (bit
>> 15) and MDIO_AN_10GBT_CTRL_MS_VALUE (bit 14) to
>> include/uapi/linux/mdio.h and also make use of it.
>> RTL8261X_MS_AUTO would become
>
>If this is all just standard 802.3, the function should be added to phy-c45.c, so
>it can be used by any PHY driver.
>
>        Andrew

Thanks for you suggestions. All the changes will be added into next version.

BRs,
Javen