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From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: Lovekesh Solanki <lovekeshsolanki00@gmail.com>
Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	Michal Pecio <michal.pecio@gmail.com>,
	Mathieu Fluhr <mathieu.fluhr@gmail.com>,
	Mario Limonciello <mario.limonciello@amd.com>,
	Thorsten Leemhuis <regressions@leemhuis.info>,
	regressions@lists.linux.dev, stable@vger.kernel.org
Subject: Re: [PATCH 2/2] xhci: drop 120ms U3 LFPS wake retry wait from runtime resume
Date: Thu, 17 Sep 2026 11:16:03 +0300	[thread overview]
Message-ID: <b80ab121-2409-4ea3-9649-3aea4d1e7507@linux.intel.com> (raw)
In-Reply-To: <aqrK5PwpJodCmbdM@eggarch>

On 9/16/26 20:47, Lovekesh Solanki wrote:
> On Fri, Sep 04, 2026 at 06:43:43PM +0530, Lovekesh Solanki wrote:
>> On Thu, Sep 03, 2026 at 10:42:48AM +0300, Mathias Nyman wrote:
>>> On 9/2/26 21:21, Lovekesh Solanki wrote:
>>>> On Wed, Sep 02, 2026 at 03:10:41PM +0300, Mathias Nyman wrote:
>>>>> It's possible PCI side or pm core already provides some easy way for xhci driver to check this.
>>>>> This specific issue is currently not on my todo list, yet.
>>>> Alright, would you like to me to work on this? I could look into
>>>> that side and possibly come up with an approach.
>>>
>>> Yes, please, that would be great.
>> I took a look at the PCI / PM side, and it seems to me there isn't any
>> reliable approach for xhci driver to use right now.
>>
>> The pci_check_pme_status() both checks and clears the pme status bit
>> and the pci core devours it inside pci_pme_wakeup(), and
>> pm_request_resume is async so xhci's runtime_resume may run much later
>> after the bit is already gone. We can't simply export pci_check_pme_status()
>> that wouldn't give any useful info.
>>
>> One solution I can think of would be adding a pme_wake_detected bitfield
>> on pci_dev struct, we set it in pci_pme_wakeup() when PME is confirmed
>> and we clear it in pci_pm_runtime_resume() after the driver has
>> returned.
>> Then, we could directly read via pdev->pme_wake_detected in its own
>> resume.
>>
>> What are your thoughts on this?
> 
> Hey Mathias,
> 
> Just wondering if you have looked into the proposal above.
> I suggested adding a new field to pci_dev struct for knowing whether a
> resume came from PCI PME side.
> 
> Would it be better to send it as an RFC too?

I don't think there is a need for a new PCI bus specific implementation.
pm core then probably handles this already in a generic way.

PCI core probably calls pm core on a PME, which then starts the wakeup,
pm core very likely keeps track of which device triggered the wakeup

The wakeup_source structure under power in the device structure (dev->power.wakeup)
looks promising.
Maybe we can find what we need from there. Hope its fields aren't cleared at the
time xhci resume is called.

Thanks
Mathias


  reply	other threads:[~2026-09-17  8:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-31 19:03 [PATCH 1/2] usb: hub: use shorter 120ms post resume hold for SS root hubs Lovekesh Solanki
2026-08-31 19:03 ` [PATCH 2/2] xhci: drop 120ms U3 LFPS wake retry wait from runtime resume Lovekesh Solanki
2026-09-01 12:53   ` Mathias Nyman
2026-09-01 15:50     ` Lovekesh Solanki
2026-09-02 12:10       ` Mathias Nyman
2026-09-02 18:21         ` Lovekesh Solanki
2026-09-03  7:42           ` Mathias Nyman
2026-09-04 13:13             ` Lovekesh Solanki
2026-09-16 17:47               ` Lovekesh Solanki
2026-09-17  8:16                 ` Mathias Nyman [this message]
2026-09-02 13:29 ` [PATCH 1/2] usb: hub: use shorter 120ms post resume hold for SS root hubs Mathias Nyman
2026-09-02 18:43   ` Lovekesh Solanki
2026-09-03  7:50     ` Mathias Nyman

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