From: Paolo Bonzini <pbonzini@redhat.com>
To: Lan Tianyu <tianyu.lan@intel.com>
Cc: rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com,
hpa@zytor.com, x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, dvyukov@google.com,
jmattson@google.com
Subject: Re: [PATCH V2] KVM/x86: Check input paging mode when cs.l is set
Date: Thu, 14 Dec 2017 12:41:06 +0100 [thread overview]
Message-ID: <bb007ee6-0921-9396-e1a2-d9ed022a8399@redhat.com> (raw)
In-Reply-To: <1513223753-551-1-git-send-email-tianyu.lan@intel.com>
On 14/12/2017 04:55, Lan Tianyu wrote:
> + * When EFER.LME and CR0.PG are set, CR4.PAE and EFER.LMA
> + * must be set.
> + */
> + if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) {
> + if (!(sregs->cr4 & X86_CR4_PAE_BIT))
> + return -EINVAL;
> + if (!(sregs->efer & EFER_LMA))
> + return -EINVAL;
> + } else if (sregs->efer & EFER_LMA)
This can just be "(sregs->efer & EFER_LMA) || sregs->cs.l", making the
next "if" redundant. Even better written as
if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) {
/*
* When EFER.LME and CR0.PG are set, the processor is in
* 64-bit mode (though maybe in a 32-bit code segment).
* CR4.PAE and EFER.LMA must be set.
*/
if (... || ...)
return -EINVAL;
} else {
/*
* Not in 64-bit mode: EFER.LMA is clear and the code
* segment cannot be 64-bit.
*/
if (... || ...)
return -EINVAL;
}
Paolo
> + return -EINVAL;
> +
> + /* When CS.L is set, vcpu should run in 64-bit mode. */
> + if (sregs->cs.l)
> + if (!((sregs->cr0 & X86_CR0_PG_BIT) &&
> + (sregs->cr4 & X86_CR4_PAE_BIT) &&
> + (sregs->efer & EFER_LME)))
> + return -EINVAL;
next prev parent reply other threads:[~2017-12-14 11:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-14 3:55 Lan Tianyu
2017-12-14 11:41 ` Paolo Bonzini [this message]
2017-12-14 14:14 ` Lan, Tianyu
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