[PATCH v3] drm/etnaviv: add optional reset support

[PATCH v3] drm/etnaviv: add optional reset support

[LECOINTRE Philippe]

Add optional reset support which is mentioned in vivante,gc.yaml to
allow the driver to work on SoCs whose reset signal is asserted by default

Signed-off-by: Philippe Lecointre <philippe.lecointre@thalesgroup.com>
Reviewed-by: Simon Lenain <simon.lenain@thalesgroup.com>
---
v3:
- Rework to match initial feedback
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 37 +++++++++++++++++++++++++++
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h |  1 +
 2 files changed, 38 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 2d4c112ce033..1961ebac315a 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -13,6 +13,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 #include <linux/thermal.h>
 
 #include "etnaviv_cmdbuf.h"
@@ -172,6 +173,25 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
 	return 0;
 }
 
+static int etnaviv_gpu_reset_deassert(struct etnaviv_gpu *gpu)
+{
+	int ret;
+
+	/* 32 core clock cycles (slowest clock) required before deassertion */
+	/* 1 microsecond might match all implementations without computation */
+	usleep_range(1, 2);
+
+	ret = reset_control_deassert(gpu->rst);
+	if (ret)
+		return ret;
+
+	/* 128 core clock cycles (slowest clock) required before any activity on AHB */
+	/* 1 microsecond might match all implementations without computation */
+	usleep_range(1, 2);
+
+	return 0;
+}
+
 static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32 model, u32 revision)
 {
 	return gpu->identity.model == model &&
@@ -799,6 +819,12 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 		goto pm_put;
 	}
 
+	ret = etnaviv_gpu_reset_deassert(gpu);
+	if (ret) {
+		dev_err(gpu->dev, "GPU reset deassert failed\n");
+		goto fail;
+	}
+
 	etnaviv_hw_identify(gpu);
 
 	if (gpu->identity.model == 0) {
@@ -1860,6 +1886,17 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev)
 	if (IS_ERR(gpu->mmio))
 		return PTR_ERR(gpu->mmio);
 
+
+	/* Get Reset: */
+	gpu->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
+	if (IS_ERR(gpu->rst))
+		return dev_err_probe(dev, PTR_ERR(gpu->rst),
+				     "failed to get reset\n");
+
+	err = reset_control_assert(gpu->rst);
+	if (err)
+		return dev_err_probe(dev, err, "failed to assert reset\n");
+
 	/* Get Interrupt: */
 	gpu->irq = platform_get_irq(pdev, 0);
 	if (gpu->irq < 0)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 4d8a7d48ade3..0985ea548b82 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -158,6 +158,7 @@ struct etnaviv_gpu {
 	struct clk *clk_reg;
 	struct clk *clk_core;
 	struct clk *clk_shader;
+	struct reset_control *rst;
 
 	unsigned int freq_scale;
 	unsigned int fe_waitcycles;
-- 
2.19.1

Re: [PATCH v3] drm/etnaviv: add optional reset support

[Lucas Stach]

Hi Philippe,

Am Freitag, dem 06.12.2024 um 17:00 +0000 schrieb LECOINTRE Philippe:
> Add optional reset support which is mentioned in vivante,gc.yaml to
> allow the driver to work on SoCs whose reset signal is asserted by default
> 
> Signed-off-by: Philippe Lecointre <philippe.lecointre@thalesgroup.com>
> Reviewed-by: Simon Lenain <simon.lenain@thalesgroup.com>

Upstream usually doesn't put much weight on such internal reviews. No
harm here, as the patch is simple enough and I do review it before
applying. Just as a hint for the future: if you want maintainers to
take such reviews into account for speeding up the adoption of a patch,
do the review on the public mailing lists.

> ---
> v3:
> - Rework to match initial feedback
> ---
>  drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 37 +++++++++++++++++++++++++++
>  drivers/gpu/drm/etnaviv/etnaviv_gpu.h |  1 +
>  2 files changed, 38 insertions(+)
> 
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 2d4c112ce033..1961ebac315a 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -13,6 +13,7 @@
>  #include <linux/platform_device.h>
>  #include <linux/pm_runtime.h>
>  #include <linux/regulator/consumer.h>
> +#include <linux/reset.h>
>  #include <linux/thermal.h>
>  
>  #include "etnaviv_cmdbuf.h"
> @@ -172,6 +173,25 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
>  	return 0;
>  }
>  
> +static int etnaviv_gpu_reset_deassert(struct etnaviv_gpu *gpu)
> +{
> +	int ret;
> +
> +	/* 32 core clock cycles (slowest clock) required before deassertion */
> +	/* 1 microsecond might match all implementations without computation */

I missed to mention this before, as I was focused on the technical
side: this is not the multiline comment style used in the
kernel/etnaviv. Please use the same style as already found in this
file.

> +	usleep_range(1, 2);
> +
> +	ret = reset_control_deassert(gpu->rst);
> +	if (ret)
> +		return ret;
> +
> +	/* 128 core clock cycles (slowest clock) required before any activity on AHB */
> +	/* 1 microsecond might match all implementations without computation */
> +	usleep_range(1, 2);
> +
> +	return 0;
> +}
> +
>  static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32 model, u32 revision)
>  {
>  	return gpu->identity.model == model &&
> @@ -799,6 +819,12 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
>  		goto pm_put;
>  	}
>  
> +	ret = etnaviv_gpu_reset_deassert(gpu);
> +	if (ret) {
> +		dev_err(gpu->dev, "GPU reset deassert failed\n");
> +		goto fail;
> +	}
> +
>  	etnaviv_hw_identify(gpu);
>  
>  	if (gpu->identity.model == 0) {
> @@ -1860,6 +1886,17 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev)
>  	if (IS_ERR(gpu->mmio))
>  		return PTR_ERR(gpu->mmio);
>  
> +
> +	/* Get Reset: */
> +	gpu->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
> +	if (IS_ERR(gpu->rst))
> +		return dev_err_probe(dev, PTR_ERR(gpu->rst),
> +				     "failed to get reset\n");
> +
> +	err = reset_control_assert(gpu->rst);
> +	if (err)
> +		return dev_err_probe(dev, err, "failed to assert reset\n");
> +
>  	/* Get Interrupt: */
>  	gpu->irq = platform_get_irq(pdev, 0);
>  	if (gpu->irq < 0)
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> index 4d8a7d48ade3..0985ea548b82 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> @@ -158,6 +158,7 @@ struct etnaviv_gpu {
>  	struct clk *clk_reg;
>  	struct clk *clk_core;
>  	struct clk *clk_shader;
> +	struct reset_control *rst;

This needs a forward declaration of struct reset_control in the header,
to avoid build failures if headers are included in a different order.
Please put them right next to the existing ones for regulator and clk.

Other than that, patch looks good to me.

Regards,
Lucas

>  
>  	unsigned int freq_scale;
>  	unsigned int fe_waitcycles;

RE: [PATCH v3] drm/etnaviv: add optional reset support

[LENAIN Simon]

Hi Lucas,

> -----Message d'origine-----
> De : Lucas Stach <l.stach@pengutronix.de>
> Envoyé : lundi 9 décembre 2024 11:07
> À : LECOINTRE Philippe <philippe.lecointre@thalesgroup.com>; Russell King
> <linux+etnaviv@armlinux.org.uk>; Christian Gmeiner
> <christian.gmeiner@gmail.com>
> Cc : David Airlie <airlied@gmail.com>; Simona Vetter <simona@ffwll.ch>;
> etnaviv@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> kernel@vger.kernel.org; LENAIN Simon <simon.lenain@thalesgroup.com>;
> BARBEAU Etienne <etienne.barbeau@thalesgroup.com>; LEJEUNE Sebastien
> <sebastien.lejeune@thalesgroup.com>
> Objet : Re: [PATCH v3] drm/etnaviv: add optional reset support
> 
> Hi Philippe,
> 
> Am Freitag, dem 06.12.2024 um 17:00 +0000 schrieb LECOINTRE Philippe:
> > Add optional reset support which is mentioned in vivante,gc.yaml to
> > allow the driver to work on SoCs whose reset signal is asserted by
> > default
> >
> > Signed-off-by: Philippe Lecointre <philippe.lecointre@thalesgroup.com>
> > Reviewed-by: Simon Lenain <simon.lenain@thalesgroup.com>
> 
> Upstream usually doesn't put much weight on such internal reviews. No
> harm here, as the patch is simple enough and I do review it before applying.
> Just as a hint for the future: if you want maintainers to take such reviews into
> account for speeding up the adoption of a patch, do the review on the public
> mailing lists.
> 

Do you think an "Acked-by:" is better for our internal review ?
Regards,
Simon

> > ---
> > v3:
> > - Rework to match initial feedback
> > ---
> >  drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 37
> > +++++++++++++++++++++++++++
> drivers/gpu/drm/etnaviv/etnaviv_gpu.h |
> > 1 +
> >  2 files changed, 38 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> > b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> > index 2d4c112ce033..1961ebac315a 100644
> > --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> > +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> > @@ -13,6 +13,7 @@
> >  #include <linux/platform_device.h>
> >  #include <linux/pm_runtime.h>
> >  #include <linux/regulator/consumer.h>
> > +#include <linux/reset.h>
> >  #include <linux/thermal.h>
> >
> >  #include "etnaviv_cmdbuf.h"
> > @@ -172,6 +173,25 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu
> *gpu, u32 param, u64 *value)
> >  	return 0;
> >  }
> >
> > +static int etnaviv_gpu_reset_deassert(struct etnaviv_gpu *gpu) {
> > +	int ret;
> > +
> > +	/* 32 core clock cycles (slowest clock) required before deassertion */
> > +	/* 1 microsecond might match all implementations without
> computation
> > +*/
> 
> I missed to mention this before, as I was focused on the technical
> side: this is not the multiline comment style used in the kernel/etnaviv.
> Please use the same style as already found in this file.
> 
> > +	usleep_range(1, 2);
> > +
> > +	ret = reset_control_deassert(gpu->rst);
> > +	if (ret)
> > +		return ret;
> > +
> > +	/* 128 core clock cycles (slowest clock) required before any activity
> on AHB */
> > +	/* 1 microsecond might match all implementations without
> computation */
> > +	usleep_range(1, 2);
> > +
> > +	return 0;
> > +}
> > +
> >  static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32
> > model, u32 revision)  {
> >  	return gpu->identity.model == model && @@ -799,6 +819,12 @@ int
> > etnaviv_gpu_init(struct etnaviv_gpu *gpu)
> >  		goto pm_put;
> >  	}
> >
> > +	ret = etnaviv_gpu_reset_deassert(gpu);
> > +	if (ret) {
> > +		dev_err(gpu->dev, "GPU reset deassert failed\n");
> > +		goto fail;
> > +	}
> > +
> >  	etnaviv_hw_identify(gpu);
> >
> >  	if (gpu->identity.model == 0) {
> > @@ -1860,6 +1886,17 @@ static int etnaviv_gpu_platform_probe(struct
> platform_device *pdev)
> >  	if (IS_ERR(gpu->mmio))
> >  		return PTR_ERR(gpu->mmio);
> >
> > +
> > +	/* Get Reset: */
> > +	gpu->rst = devm_reset_control_get_optional_exclusive(&pdev-
> >dev, NULL);
> > +	if (IS_ERR(gpu->rst))
> > +		return dev_err_probe(dev, PTR_ERR(gpu->rst),
> > +				     "failed to get reset\n");
> > +
> > +	err = reset_control_assert(gpu->rst);
> > +	if (err)
> > +		return dev_err_probe(dev, err, "failed to assert reset\n");
> > +
> >  	/* Get Interrupt: */
> >  	gpu->irq = platform_get_irq(pdev, 0);
> >  	if (gpu->irq < 0)
> > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> > b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> > index 4d8a7d48ade3..0985ea548b82 100644
> > --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> > +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> > @@ -158,6 +158,7 @@ struct etnaviv_gpu {
> >  	struct clk *clk_reg;
> >  	struct clk *clk_core;
> >  	struct clk *clk_shader;
> > +	struct reset_control *rst;
> 
> This needs a forward declaration of struct reset_control in the header, to
> avoid build failures if headers are included in a different order.
> Please put them right next to the existing ones for regulator and clk.
> 
> Other than that, patch looks good to me.
> 
> Regards,
> Lucas
> 
> >
> >  	unsigned int freq_scale;
> >  	unsigned int fe_waitcycles;