* [PATCH v3 0/2] Enable CTCU device for QCS8300
@ 2025-10-13 8:34 Jie Gan
2025-10-13 8:34 ` [PATCH v3 1/2] dt-bindings: arm: add " Jie Gan
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Jie Gan @ 2025-10-13 8:34 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Jie Gan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, coresight, linux-arm-kernel, devicetree,
linux-kernel, Jie Gan, Krzysztof Kozlowski, Konrad Dybcio
Hi Suzuki, Mike, James, Rob
Can you please help to review the dt patches? The dt maintainer needs
your comment before apply this patch series.
Thanks a lot
Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in binding to utilize
the compitable of the SA8775p platform becuase the CTCU for QCS8300 shares same
configurations as SA8775p platform.
Changes in V3:
1. rebased on tag next-20251010
Link to V2 - https://lore.kernel.org/all/20250624095905.7609-1-jie.gan@oss.qualcomm.com/
Changes in V2:
1. Add Krzysztof's R-B tag for dt-binding patch.
2. Add Konrad's Acked-by tag for dt patch.
3. Rebased on tag next-20250623.
4. Missed email addresses for coresight's maintainers in V1, loop them.
Link to V1 - https://lore.kernel.org/all/20250327024943.3502313-1-jie.gan@oss.qualcomm.com/
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
Jie Gan (2):
dt-bindings: arm: add CTCU device for QCS8300
arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes
.../bindings/arm/qcom,coresight-ctcu.yaml | 9 +-
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 153 +++++++++++++++++++++
2 files changed, 160 insertions(+), 2 deletions(-)
---
base-commit: 2b763d4652393c90eaa771a5164502ec9dd965ae
change-id: 20251013-enable-ctcu-for-qcs8300-ec83661e5acd
Best regards,
--
Jie Gan <jie.gan@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3 1/2] dt-bindings: arm: add CTCU device for QCS8300
2025-10-13 8:34 [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
@ 2025-10-13 8:34 ` Jie Gan
2025-10-27 15:14 ` Suzuki K Poulose
2025-10-27 15:15 ` Bjorn Andersson
2025-10-13 8:34 ` [PATCH v3 2/2] arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes Jie Gan
2025-10-27 1:15 ` [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
2 siblings, 2 replies; 6+ messages in thread
From: Jie Gan @ 2025-10-13 8:34 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Jie Gan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, coresight, linux-arm-kernel, devicetree,
linux-kernel, Jie Gan, Krzysztof Kozlowski
The CTCU device for QCS8300 shares the same configurations as SA8775p. Add
a fallback to enable the CTCU for QCS8300 to utilize the compitable of the
SA8775p.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
index c969c16c21ef..460f38ddbd73 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
@@ -26,8 +26,13 @@ description: |
properties:
compatible:
- enum:
- - qcom,sa8775p-ctcu
+ oneOf:
+ - items:
+ - enum:
+ - qcom,qcs8300-ctcu
+ - const: qcom,sa8775p-ctcu
+ - enum:
+ - qcom,sa8775p-ctcu
reg:
maxItems: 1
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3 2/2] arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes
2025-10-13 8:34 [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
2025-10-13 8:34 ` [PATCH v3 1/2] dt-bindings: arm: add " Jie Gan
@ 2025-10-13 8:34 ` Jie Gan
2025-10-27 1:15 ` [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
2 siblings, 0 replies; 6+ messages in thread
From: Jie Gan @ 2025-10-13 8:34 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Jie Gan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, coresight, linux-arm-kernel, devicetree,
linux-kernel, Jie Gan, Konrad Dybcio
Add CTCU and ETR nodes in DT to enable expected functionalities.
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 153 ++++++++++++++++++++++++++++++++++
1 file changed, 153 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 8d78ccac411e..74ae32bfec93 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -2482,6 +2482,35 @@ lpass_ag_noc: interconnect@3c40000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ ctcu@4001000 {
+ compatible = "qcom,qcs8300-ctcu", "qcom,sa8775p-ctcu";
+ reg = <0x0 0x04001000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ctcu_in0: endpoint {
+ remote-endpoint = <&etr0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ctcu_in1: endpoint {
+ remote-endpoint = <&etr1_out>;
+ };
+ };
+ };
+ };
+
stm@4002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x0 0x04002000 0x0 0x1000>,
@@ -2676,6 +2705,122 @@ qdss_funnel_out: endpoint {
};
};
+ replicator@4046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x04046000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ qdss_rep_in: endpoint {
+ remote-endpoint = <&swao_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ qdss_rep_out0: endpoint {
+ remote-endpoint = <&etr_rep_in>;
+ };
+ };
+ };
+ };
+
+ tmc@4048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x04048000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ iommus = <&apps_smmu 0x04c0 0x00>;
+
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ etr0_in: endpoint {
+ remote-endpoint = <&etr_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr0_out: endpoint {
+ remote-endpoint = <&ctcu_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@404e000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x0404e000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ etr_rep_in: endpoint {
+ remote-endpoint = <&qdss_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ etr_rep_out0: endpoint {
+ remote-endpoint = <&etr0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ etr_rep_out1: endpoint {
+ remote-endpoint = <&etr1_in>;
+ };
+ };
+ };
+ };
+
+ tmc@404f000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x0404f000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ iommus = <&apps_smmu 0x04a0 0x40>;
+
+ arm,scatter-gather;
+ arm,buffer-size = <0x400000>;
+
+ in-ports {
+ port {
+ etr1_in: endpoint {
+ remote-endpoint = <&etr_rep_out1>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr1_out: endpoint {
+ remote-endpoint = <&ctcu_in1>;
+ };
+ };
+ };
+ };
+
tpdm@4841000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x04841000 0x0 0x1000>;
@@ -3105,6 +3250,14 @@ out-ports {
#address-cells = <1>;
#size-cells = <0>;
+ port@0 {
+ reg = <0>;
+
+ swao_rep_out0: endpoint {
+ remote-endpoint = <&qdss_rep_in>;
+ };
+ };
+
port@1 {
reg = <1>;
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 0/2] Enable CTCU device for QCS8300
2025-10-13 8:34 [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
2025-10-13 8:34 ` [PATCH v3 1/2] dt-bindings: arm: add " Jie Gan
2025-10-13 8:34 ` [PATCH v3 2/2] arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes Jie Gan
@ 2025-10-27 1:15 ` Jie Gan
2 siblings, 0 replies; 6+ messages in thread
From: Jie Gan @ 2025-10-27 1:15 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, coresight, linux-arm-kernel, devicetree,
linux-kernel, Krzysztof Kozlowski, Konrad Dybcio, Jie Gan
On 10/13/2025 4:34 PM, Jie Gan wrote:
> Hi Suzuki, Mike, James, Rob
>
> Can you please help to review the dt patches? The dt maintainer needs
> your comment before apply this patch series.
>
> Thanks a lot
>
Gentle reminder.
Thanks
Jie
> Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in binding to utilize
> the compitable of the SA8775p platform becuase the CTCU for QCS8300 shares same
> configurations as SA8775p platform.
>
> Changes in V3:
> 1. rebased on tag next-20251010
> Link to V2 - https://lore.kernel.org/all/20250624095905.7609-1-jie.gan@oss.qualcomm.com/
>
> Changes in V2:
> 1. Add Krzysztof's R-B tag for dt-binding patch.
> 2. Add Konrad's Acked-by tag for dt patch.
> 3. Rebased on tag next-20250623.
> 4. Missed email addresses for coresight's maintainers in V1, loop them.
> Link to V1 - https://lore.kernel.org/all/20250327024943.3502313-1-jie.gan@oss.qualcomm.com/
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> Jie Gan (2):
> dt-bindings: arm: add CTCU device for QCS8300
> arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes
>
> .../bindings/arm/qcom,coresight-ctcu.yaml | 9 +-
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 153 +++++++++++++++++++++
> 2 files changed, 160 insertions(+), 2 deletions(-)
> ---
> base-commit: 2b763d4652393c90eaa771a5164502ec9dd965ae
> change-id: 20251013-enable-ctcu-for-qcs8300-ec83661e5acd
>
> Best regards,
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: arm: add CTCU device for QCS8300
2025-10-13 8:34 ` [PATCH v3 1/2] dt-bindings: arm: add " Jie Gan
@ 2025-10-27 15:14 ` Suzuki K Poulose
2025-10-27 15:15 ` Bjorn Andersson
1 sibling, 0 replies; 6+ messages in thread
From: Suzuki K Poulose @ 2025-10-27 15:14 UTC (permalink / raw)
To: Jie Gan, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Jie Gan, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, coresight, linux-arm-kernel, devicetree,
linux-kernel, Krzysztof Kozlowski
On 13/10/2025 09:34, Jie Gan wrote:
> The CTCU device for QCS8300 shares the same configurations as SA8775p. Add
> a fallback to enable the CTCU for QCS8300 to utilize the compitable of the
> SA8775p.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> index c969c16c21ef..460f38ddbd73 100644
> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> @@ -26,8 +26,13 @@ description: |
>
> properties:
> compatible:
> - enum:
> - - qcom,sa8775p-ctcu
> + oneOf:
> + - items:
> + - enum:
> + - qcom,qcs8300-ctcu
> + - const: qcom,sa8775p-ctcu
> + - enum:
> + - qcom,sa8775p-ctcu
>
> reg:
> maxItems: 1
>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: arm: add CTCU device for QCS8300
2025-10-13 8:34 ` [PATCH v3 1/2] dt-bindings: arm: add " Jie Gan
2025-10-27 15:14 ` Suzuki K Poulose
@ 2025-10-27 15:15 ` Bjorn Andersson
1 sibling, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2025-10-27 15:15 UTC (permalink / raw)
To: Jie Gan
Cc: Suzuki K Poulose, Mike Leach, James Clark, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Mao Jinlong,
Jie Gan, Konrad Dybcio, linux-arm-msm, coresight,
linux-arm-kernel, devicetree, linux-kernel, Krzysztof Kozlowski
On Mon, Oct 13, 2025 at 04:34:37PM +0800, Jie Gan wrote:
> The CTCU device for QCS8300 shares the same configurations as SA8775p. Add
> a fallback to enable the CTCU for QCS8300 to utilize the compitable of the
> SA8775p.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Regards,
Bjorn
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> index c969c16c21ef..460f38ddbd73 100644
> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> @@ -26,8 +26,13 @@ description: |
>
> properties:
> compatible:
> - enum:
> - - qcom,sa8775p-ctcu
> + oneOf:
> + - items:
> + - enum:
> + - qcom,qcs8300-ctcu
> + - const: qcom,sa8775p-ctcu
> + - enum:
> + - qcom,sa8775p-ctcu
>
> reg:
> maxItems: 1
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-10-27 15:14 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2025-10-13 8:34 [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
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2025-10-27 15:14 ` Suzuki K Poulose
2025-10-27 15:15 ` Bjorn Andersson
2025-10-13 8:34 ` [PATCH v3 2/2] arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes Jie Gan
2025-10-27 1:15 ` [PATCH v3 0/2] Enable CTCU device for QCS8300 Jie Gan
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