* 386/smp issue with atomic_add_return()
@ 2006-04-12 2:13 lepton
2006-04-12 3:04 ` Joshua Hudson
0 siblings, 1 reply; 2+ messages in thread
From: lepton @ 2006-04-12 2:13 UTC (permalink / raw)
To: lkm
Hi
Is there any smp box with 386 cpu?
If it exist, then I think atomic_add_return has a problem.
Just disabling local interrupts can not keep another cpu from entering this function.
What do you think about this?
This is the code (copied from 2.6.16.4):
#ifdef CONFIG_M386
no_xadd: /* Legacy 386 processor */
local_irq_disable();
__i = atomic_read(v);
atomic_set(v, i + __i);
local_irq_enable();
return i + __i;
#endif
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: 386/smp issue with atomic_add_return()
2006-04-12 2:13 386/smp issue with atomic_add_return() lepton
@ 2006-04-12 3:04 ` Joshua Hudson
0 siblings, 0 replies; 2+ messages in thread
From: Joshua Hudson @ 2006-04-12 3:04 UTC (permalink / raw)
To: lepton, linux-kernel
On 4/11/06, lepton <ytht.net@gmail.com> wrote:
> Hi
> Is there any smp box with 386 cpu?
> If it exist, then I think atomic_add_return has a problem.
> Just disabling local interrupts can not keep another cpu from entering this function.
> What do you think about this?
>
> This is the code (copied from 2.6.16.4):
>
> #ifdef CONFIG_M386
> no_xadd: /* Legacy 386 processor */
> local_irq_disable();
> __i = atomic_read(v);
> atomic_set(v, i + __i);
> local_irq_enable();
> return i + __i;
> #endif
If such a box exists (and I doubt), it is not a commody PC.
First x86 SMP motherboard I heard of was a P1 with two processors.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2006-04-12 2:13 386/smp issue with atomic_add_return() lepton
2006-04-12 3:04 ` Joshua Hudson
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