From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>,
patrick@stwcx.xyz, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v12 01/28] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices
Date: Mon, 19 Aug 2024 09:55:11 +0930 [thread overview]
Message-ID: <bdeba6fae8db2dd73ae668f6e228f8378fa439bd.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20240816092417.3651434-2-Delphine_CC_Chiu@wiwynn.com>
On Fri, 2024-08-16 at 17:23 +0800, Delphine CC Chiu wrote:
> Revise Yosemite 4 devicetree for devices behind i2c-mux
> - Add gpio and eeprom behind i2c-mux
> - Remove redundant idle-state setting for i2c-mux
>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
> ---
> .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 381 ++++++++++++++++--
> 1 file changed, 347 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> index 98477792aa00..ce206e2c461b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> @@ -17,6 +17,25 @@ aliases {
> serial6 = &uart7;
> serial7 = &uart8;
> serial8 = &uart9;
> +
> + i2c16 = &imux16;
> + i2c17 = &imux17;
> + i2c18 = &imux18;
> + i2c19 = &imux19;
> + i2c20 = &imux20;
> + i2c21 = &imux21;
> + i2c22 = &imux22;
> + i2c23 = &imux23;
> + i2c24 = &imux24;
> + i2c25 = &imux25;
> + i2c26 = &imux26;
> + i2c27 = &imux27;
> + i2c28 = &imux28;
> + i2c29 = &imux29;
> + i2c30 = &imux30;
> + i2c31 = &imux31;
> + i2c32 = &imux32;
> + i2c33 = &imux33;
> };
>
> chosen {
> @@ -259,9 +278,109 @@ &i2c8 {
> bus-frequency = <400000>;
> i2c-mux@70 {
> compatible = "nxp,pca9544";
> - idle-state = <0>;
> i2c-mux-idle-disconnect;
> reg = <0x70>;
> +
> + imux16: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux17: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux18: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux19: i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> };
> };
>
> @@ -270,15 +389,174 @@ &i2c9 {
> bus-frequency = <400000>;
> i2c-mux@71 {
> compatible = "nxp,pca9544";
> - idle-state = <0>;
> i2c-mux-idle-disconnect;
> reg = <0x71>;
> +
> + imux20: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux21: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux22: i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> +
> + imux23: i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> +
> + gpio@49 {
> + compatible = "nxp,pca9537";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c128";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c128";
> + reg = <0x51>;
> + };
> +
> + eeprom@54 {
> + compatible = "atmel,24c128";
> + reg = <0x54>;
> + };
> + };
> };
> };
>
> &i2c10 {
> status = "okay";
> bus-frequency = <400000>;
> + i2c-mux@74 {
> + compatible = "nxp,pca9544";
> + i2c-mux-idle-disconnect;
> + reg = <0x74>;
> +
> + imux28: i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + gpio@20 {
> + compatible = "nxp,pca9506";
> + reg = <0x20>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpio@21 {
> + compatible = "nxp,pca9506";
> + reg = <0x21>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpio@22 {
> + compatible = "nxp,pca9506";
> + reg = <0x22>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpio@23 {
> + compatible = "nxp,pca9506";
> + reg = <0x23>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpio@24 {
> + compatible = "nxp,pca9506";
> + reg = <0x24>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names =
> + "","","","",
> + "NIC0_MAIN_PWR_EN","NIC1_MAIN_PWR_EN",
> + "NIC2_MAIN_PWR_EN","NIC3_MAIN_PWR_EN",
> + "","","","","","","","",
> + "","","","","","","","",
> + "","","","","","","","";
> + };
> + };
> +
> + imux29: i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> + };
> };
>
> &i2c11 {
> @@ -440,16 +718,14 @@ eeprom@51 {
> reg = <0x51>;
> };
>
> - i2c-mux@71 {
> - compatible = "nxp,pca9846";
> + i2c-mux@74 {
> + compatible = "nxp,pca9546";
> #address-cells = <1>;
> #size-cells = <0>;
> -
> - idle-state = <0>;
> i2c-mux-idle-disconnect;
> - reg = <0x71>;
> + reg = <0x74>;
>
> - i2c@0 {
> + imux30: i2c@0 {
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <0>;
> @@ -457,26 +733,26 @@ i2c@0 {
> adc@1f {
> compatible = "ti,adc128d818";
> reg = <0x1f>;
> - ti,mode = /bits/ 8 <2>;
> + ti,mode = /bits/ 8 <1>;
> };
>
> pwm@20{
> - compatible = "max31790";
> + compatible = "maxim,max31790";
> + pwm-as-tach = <4 5>;
> reg = <0x20>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> };
>
> gpio@22{
> compatible = "ti,tca6424";
> reg = <0x22>;
> + gpio-controller;
> + #gpio-cells = <2>;
> };
>
> - pwm@23{
> - compatible = "max31790";
> - reg = <0x23>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + pwm@2f{
> + compatible = "maxim,max31790";
> + pwm-as-tach = <4 5>;
> + reg = <0x2f>;
> };
>
> adc@33 {
> @@ -499,34 +775,34 @@ gpio@61 {
> };
> };
>
> - i2c@1 {
> + imux31: i2c@1 {
> #address-cells = <1>;
> #size-cells = <0>;
> - reg = <0>;
> + reg = <1>;
>
> adc@1f {
> compatible = "ti,adc128d818";
> reg = <0x1f>;
> - ti,mode = /bits/ 8 <2>;
> + ti,mode = /bits/ 8 <1>;
> };
>
> pwm@20{
> - compatible = "max31790";
> + compatible = "maxim,max31790";
The max31790 binding isn't yet upstream[1]. Please drop these nodes
entirely until the binding has been accepted. You can send a follow-up
patch adding them once it is merged.
Please make sure to run `./scripts/checkpatch.pl` and `make dtbs_check`
on your changes.
Andrew
[1]: https://lore.kernel.org/all/20240813084152.25002-1-chanh@os.amperecomputing.com/
next prev parent reply other threads:[~2024-08-19 0:25 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-16 9:23 [PATCH v12 00/28] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 01/28] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2024-08-19 0:25 ` Andrew Jeffery [this message]
2024-08-16 9:23 ` [PATCH v12 02/28] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 03/28] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 04/28] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 05/28] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 06/28] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 07/28] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 08/28] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 09/28] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 10/28] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
2024-08-19 0:30 ` Andrew Jeffery
2024-08-16 9:23 ` [PATCH v12 11/28] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
2024-08-16 9:23 ` [PATCH v12 12/28] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 13/28] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 14/28] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
2024-08-19 0:32 ` Andrew Jeffery
2024-08-16 9:24 ` [PATCH v12 15/28] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 16/28] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 17/28] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 18/28] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
2024-08-19 0:46 ` Andrew Jeffery
2024-08-16 9:24 ` [PATCH v12 19/28] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 20/28] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 21/28] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 22/28] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 23/28] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 24/28] ARM: dts: aspeed: yosemite4: add XDP710 Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 25/28] ARM: dts: aspeed: yosemite4: add RTQ6056 support Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 26/28] ARM: dts: aspeed: yosemite4: add MP5990 support Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 27/28] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver Delphine CC Chiu
2024-08-16 9:24 ` [PATCH v12 28/28] ARM: dts: aspeed: yosemite4: fix GPIO linename typo Delphine CC Chiu
2024-08-17 5:40 ` kernel test robot
2024-08-19 0:56 ` Andrew Jeffery
2024-08-19 12:48 ` Rob Herring
2024-08-19 1:09 ` [PATCH v12 00/28] Add i2c-mux and eeprom devices for Meta Yosemite 4 Andrew Jeffery
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