* [PATCH v2 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1
2024-02-19 9:04 [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath
@ 2024-02-19 9:04 ` Vaishnav Achath
2024-02-19 9:04 ` [PATCH v2 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Vaishnav Achath @ 2024-02-19 9:04 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel, vaishnav.a, u-kumar1,
s-vadapalli
From: Siddharth Vadapalli <s-vadapalli@ti.com>
Enable MAC Port 1 of CPSW3G instance of CPSW Ethernet Switch in
RGMII-RXID mode of operation. Port 2 is not connected on the EVM,
thus keep it disabled.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 53 +++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index b4f2fee53a97..9e12a6e9111f 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -8,6 +8,7 @@
/dts-v1/;
+#include <dt-bindings/net/ti-dp83867.h>
#include "k3-j722s.dtsi"
/ {
@@ -160,6 +161,58 @@ J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
>;
bootph-all;
};
+
+ mdio_pins_default: mdio-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
+ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
+ >;
+ };
+
+ rgmii1_pins_default: rgmii1-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
+ J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
+ J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
+ J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
+ J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
+ J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
+ J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
+ J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
+ J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
+ J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
+ J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
+ J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
+ >;
+ };
+};
+
+&cpsw3g {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii1_pins_default>;
+};
+
+&cpsw3g_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins_default>;
+
+ cpsw3g_phy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,min-output-impedance;
+ };
+};
+
+&cpsw_port1 {
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&cpsw3g_phy0>;
+};
+
+&cpsw_port2 {
+ status = "disabled";
};
&main_gpio1 {
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v2 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support
2024-02-19 9:04 [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath
2024-02-19 9:04 ` [PATCH v2 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 Vaishnav Achath
@ 2024-02-19 9:04 ` Vaishnav Achath
2024-02-19 14:46 ` [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Kumar, Udit
2024-02-22 13:22 ` Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Vaishnav Achath @ 2024-02-19 9:04 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel, vaishnav.a, u-kumar1,
s-vadapalli
J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected
to the OSPI interface, add support for the flash and describe
the partition information as per bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
V1->V2:
* Update comments indicating PAD numbers.
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 +++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 9e12a6e9111f..cee3a8661d5e 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
};
+ ospi0_pins_default: ospi0-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */
+ J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */
+ J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */
+ J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */
+ J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */
+ J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */
+ J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (L21) OSPI0_D4 */
+ J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (M26) OSPI0_D5 */
+ J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (N27) OSPI0_D6 */
+ J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (M27) OSPI0_D7 */
+ J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (L22) OSPI0_DQS */
+ >;
+ bootph-all;
+ };
+
rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
@@ -290,6 +307,68 @@ exp1: gpio@23 {
};
};
+&ospi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ospi0_pins_default>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ spi-max-frequency = <25000000>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <4>;
+ bootph-all;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x00 0x80000>;
+ };
+
+ partition@80000 {
+ label = "ospi.tispl";
+ reg = <0x80000 0x200000>;
+ };
+
+ partition@280000 {
+ label = "ospi.u-boot";
+ reg = <0x280000 0x400000>;
+ };
+
+ partition@680000 {
+ label = "ospi.env";
+ reg = <0x680000 0x40000>;
+ };
+
+ partition@6c0000 {
+ label = "ospi.env.backup";
+ reg = <0x6c0000 0x40000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fc0000 {
+ label = "ospi.phypattern";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };
+ };
+
+};
+
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
--
2.34.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM
2024-02-19 9:04 [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath
2024-02-19 9:04 ` [PATCH v2 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 Vaishnav Achath
2024-02-19 9:04 ` [PATCH v2 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath
@ 2024-02-19 14:46 ` Kumar, Udit
2024-02-22 13:22 ` Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Kumar, Udit @ 2024-02-19 14:46 UTC (permalink / raw)
To: Vaishnav Achath, nm, vigneshr, kristo, robh,
krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel, s-vadapalli
Thanks Vaishnav
On 2/19/2024 2:34 PM, Vaishnav Achath wrote:
> Hi,
>
> This series adds support for Ethernet and OSPI NOR flash on J722S EVM.
>
> V1: https://lore.kernel.org/all/20240216135533.904130-1-vaishnav.a@ti.com/
>
> Changelog:
> V1->V2:
> * Update comments indicating PAD numbers.
>
> EVM Schematics are available at:
> https://www.ti.com/lit/zip/sprr495
>
> Test log (6.8.0-rc4-next-20240216):
> https://gist.github.com/vaishnavachath/b04e3be90af4cdec59fb0d9cc72441b9
>
> For those interested, more details about this SoC can be found in the
> Technical Reference Manual here:
> https://www.ti.com/lit/zip/sprujb3
>
> Thanks and Regards,
> Vaishnav
>
> Siddharth Vadapalli (1):
> arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1
Series Reviewed-by: Udit Kumar <u-kumar1@ti.com>
>
> Vaishnav Achath (1):
> arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support
>
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 132 ++++++++++++++++++++++++
> 1 file changed, 132 insertions(+)
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM
2024-02-19 9:04 [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath
` (2 preceding siblings ...)
2024-02-19 14:46 ` [PATCH v2 0/2] Add OSPI and Ethernet support on J722S EVM Kumar, Udit
@ 2024-02-22 13:22 ` Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Vignesh Raghavendra @ 2024-02-22 13:22 UTC (permalink / raw)
To: nm, kristo, robh, krzysztof.kozlowski+dt, conor+dt, Vaishnav Achath
Cc: Vignesh Raghavendra, linux-arm-kernel, devicetree, linux-kernel,
u-kumar1, s-vadapalli
Hi Vaishnav Achath,
On Mon, 19 Feb 2024 14:34:33 +0530, Vaishnav Achath wrote:
> This series adds support for Ethernet and OSPI NOR flash on J722S EVM.
>
> V1: https://lore.kernel.org/all/20240216135533.904130-1-vaishnav.a@ti.com/
>
> Changelog:
> V1->V2:
> * Update comments indicating PAD numbers.
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1
commit: 9aa197b64df4c382763f032a31b35cad92cbce17
[2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support
commit: 2e53b9c05a1589577565625fdb45cf918b54eb39
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
^ permalink raw reply [flat|nested] 5+ messages in thread