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From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Yuriy Kolerov <yuriy.kolerov@synopsys.com>,
	<linux-snps-arc@lists.infradead.org>
Cc: <Alexey.Brodkin@synopsys.com>, <linux-kernel@vger.kernel.org>,
	<marc.zyngier@arm.com>
Subject: Re: [PATCH 2/6] ARCv2: MCIP: Add structure for build register of IDU
Date: Mon, 30 Jan 2017 10:57:59 -0800	[thread overview]
Message-ID: <bf657e2c-1be6-f1ab-4f61-5e99a64e5f8a@synopsys.com> (raw)
In-Reply-To: <1485561703-20921-3-git-send-email-yuriy.kolerov@synopsys.com>

On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> This structure is necessary for retrieving of supported
> number of common interrupts in IDU interrupt controller.
> 
> Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
> ---
>  include/soc/arc/mcip.h | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/include/soc/arc/mcip.h b/include/soc/arc/mcip.h
> index 6902c2a..798c01b 100644
> --- a/include/soc/arc/mcip.h
> +++ b/include/soc/arc/mcip.h
> @@ -14,6 +14,7 @@
>  #include <soc/arc/aux.h>
>  
>  #define ARC_REG_MCIP_BCR	0x0d0
> +#define ARC_REG_MCIP_IDU_BCR	0x0D5
>  #define ARC_REG_MCIP_CMD	0x600
>  #define ARC_REG_MCIP_WDATA	0x601
>  #define ARC_REG_MCIP_READBACK	0x602
> @@ -69,6 +70,22 @@ struct mcip_bcr {
>  #endif
>  };
>  
> +struct mcip_idu_bcr {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> +	unsigned int pad:21, cirqnum:3, ver:8;
> +#else
> +	unsigned int ver:8, cirqnum:3, pad:21;
> +#endif
> +};
> +
> +
> +/*
> + * Build register for IDU contains not an actual number of supported common
> + * interrupts but an exponent of 2 which must be multiplied by 4 to
> + * get a number of supported common interrupts.
> + */
> +#define mcip_idu_bcr_to_nr_irqs(bcr) (4 * (1 << (bcr).cirqnum))
> +
>  /*
>   * MCIP programming model
>   *
> 


Please squash this into patch which uses this infrastructure !

  reply	other threads:[~2017-01-30 18:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-28  0:01 [PATCH 0/6] Use build registers for getting numbers of interrupts Yuriy Kolerov
2017-01-28  0:01 ` [PATCH 1/6] ARCv2: IRQ: Move structures for core intc to the header Yuriy Kolerov
2017-01-30 18:56   ` Vineet Gupta
2017-01-28  0:01 ` [PATCH 2/6] ARCv2: MCIP: Add structure for build register of IDU Yuriy Kolerov
2017-01-30 18:57   ` Vineet Gupta [this message]
2017-01-28  0:01 ` [PATCH 3/6] ARCv2: IRQ: Add macro for the first external interrupt number Yuriy Kolerov
2017-01-30 19:01   ` Vineet Gupta
2017-01-28  0:01 ` [PATCH 4/6] ARCv2: IRQ: Remove option for setting number of interrupts Yuriy Kolerov
2017-01-30 18:59   ` Vineet Gupta
2017-01-28  0:01 ` [PATCH 5/6] ARCv2: IRQ: Use build registers for getting numbers " Yuriy Kolerov
2017-01-28  0:01 ` [PATCH 6/6] ARCv2: IRQ: Set a default priority for all core interrupts Yuriy Kolerov

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