From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Yuriy Kolerov <yuriy.kolerov@synopsys.com>,
<linux-snps-arc@lists.infradead.org>
Cc: <Alexey.Brodkin@synopsys.com>, <linux-kernel@vger.kernel.org>,
<marc.zyngier@arm.com>
Subject: Re: [PATCH 1/6] ARCv2: IRQ: Move structures for core intc to the header
Date: Mon, 30 Jan 2017 10:56:59 -0800 [thread overview]
Message-ID: <c9572049-41a1-16fb-afda-d3275a117da0@synopsys.com> (raw)
In-Reply-To: <1485561703-20921-2-git-send-email-yuriy.kolerov@synopsys.com>
On 01/27/2017 04:01 PM, Yuriy Kolerov wrote:
> Also add new macro ARC_REG_STATUS32 for the address of STATUS32
> auxiliary register. It is better to use it instead of magic numbers.
>
> Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com>
> ---
> arch/arc/include/asm/arcregs.h | 26 ++++++++++++++++++++++++++
> arch/arc/kernel/intc-arcv2.c | 23 +++--------------------
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
> index f659942..bc1f7bf 100644
> --- a/arch/arc/include/asm/arcregs.h
> +++ b/arch/arc/include/asm/arcregs.h
[snip]...
> +
> +struct aux_irq_ctrl_arcv2 {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> + unsigned int res3:18, save_idx_regs:1, res2:1, save_u_to_u:1,
> + save_lp_regs:1, save_blink:1, res:4, save_nr_gpr_pairs:5;
> +#else
> + unsigned int save_nr_gpr_pairs:5, res:4, save_blink:1, save_lp_regs:1,
> + save_u_to_u:1, res2:1, save_idx_regs:1, res3:18;
> +#endif
> +};
> +
arcreg.h used to be dumping ground for every struct definition which is wrong.
I've trimmed it gradually - so please don't reintroduce stuff here, unless it is
really arc global.
> /*
> *******************************************************************
> * Generic structures to hold build configuration used at runtime
> diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
> index ecef0fb..2f31bb1 100644
> --- a/arch/arc/kernel/intc-arcv2.c
> +++ b/arch/arc/kernel/intc-arcv2.c
> @@ -24,25 +24,8 @@ void arc_init_IRQ(void)
> {
[snip]...
> @@ -69,7 +52,7 @@ void arc_init_IRQ(void)
> irq_bcr.firq ? " FIRQ (not used)":"");
>
> /* setup status32, don't enable intr yet as kernel doesn't want */
> - tmp = read_aux_reg(0xa);
> + tmp = read_aux_reg(ARC_REG_STATUS32);
This is fine !
> tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
> tmp &= ~STATUS_IE_MASK;
> asm volatile("kflag %0 \n"::"r"(tmp));
>
next prev parent reply other threads:[~2017-01-30 18:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-28 0:01 [PATCH 0/6] Use build registers for getting numbers of interrupts Yuriy Kolerov
2017-01-28 0:01 ` [PATCH 1/6] ARCv2: IRQ: Move structures for core intc to the header Yuriy Kolerov
2017-01-30 18:56 ` Vineet Gupta [this message]
2017-01-28 0:01 ` [PATCH 2/6] ARCv2: MCIP: Add structure for build register of IDU Yuriy Kolerov
2017-01-30 18:57 ` Vineet Gupta
2017-01-28 0:01 ` [PATCH 3/6] ARCv2: IRQ: Add macro for the first external interrupt number Yuriy Kolerov
2017-01-30 19:01 ` Vineet Gupta
2017-01-28 0:01 ` [PATCH 4/6] ARCv2: IRQ: Remove option for setting number of interrupts Yuriy Kolerov
2017-01-30 18:59 ` Vineet Gupta
2017-01-28 0:01 ` [PATCH 5/6] ARCv2: IRQ: Use build registers for getting numbers " Yuriy Kolerov
2017-01-28 0:01 ` [PATCH 6/6] ARCv2: IRQ: Set a default priority for all core interrupts Yuriy Kolerov
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