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From: Kever Yang <kever.yang@rock-chips.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: heiko@sntech.de, linux-rockchip@lists.infradead.org,
	devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	Frank Wang <frank.wang@rock-chips.com>,
	Rob Herring <robh@kernel.org>, Liang Chen <cl@rock-chips.com>,
	Detlev Casanova <detlev.casanova@collabora.com>,
	linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Elaine Zhang <zhangqing@rock-chips.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 3/7] dts: arm64: rockchip: Add rk3576 pcie nodes
Date: Mon, 23 Dec 2024 18:49:23 +0800	[thread overview]
Message-ID: <bfd84b6b-9b19-4d9b-b0a3-cb6ed1f8084c@rock-chips.com> (raw)
In-Reply-To: <i54jjqt7uaxrurdapsyxwmb5iokiwzgm5cvlaamlggycrpyd3v@azhmfwgetrzm>

Hi Krzysztof,

On 2024/12/22 14:38, Krzysztof Kozlowski wrote:
> On Fri, Dec 20, 2024 at 06:15:47PM +0800, Kever Yang wrote:
>> rk3576 has two pcie controller, both are pcie2x1 used with
>> naneng-combphy.
>>
>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>> ---
> Please use subject prefixes matching the subsystem. You can get them for
> example with 'git log --oneline -- DIRECTORY_OR_FILE' on the directory
> your patch is touching. For bindings, the preferred subjects are
> explained here:
> https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters
>
Will update with arm64: dts: .
>> Changes in v2:
>> - Update clock and reset names and sequence to pass DTB check
>>
>>   arch/arm64/boot/dts/rockchip/rk3576.dtsi | 109 +++++++++++++++++++++++
>>   1 file changed, 109 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> index a147879da501..df7dfe702221 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> @@ -1016,6 +1016,115 @@ qos_npu_m1ro: qos@27f22100 {
>>   			reg = <0x0 0x27f22100 0x0 0x20>;
>>   		};
>>   
>> +		pcie0: pcie@2a200000 {
>> +			compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";
>> +			bus-range = <0x0 0xf>;
> Follow DTS coding style in properties order and everything around here.

I can do it for most of the properties, but is there any other rules 
other than sort,

eg. compatible and reg in the beginning and status in the end?


Thanks,

- Kever

>
> Best regards,
> Krzysztof
>
>

  reply	other threads:[~2024-12-23 11:04 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-20 10:15 [PATCH v2 0/7] Rockchip: add Rockchip rk3576 EVB1 board Kever Yang
2024-12-20 10:15 ` [PATCH v2 1/7] dts: arm64: rockchip: Add rk3576 naneng combphy nodes Kever Yang
2024-12-20 10:15 ` [PATCH v2 2/7] dt-bindings: PCI: dwc: rockchip: Add rk3576 support Kever Yang
2024-12-20 11:43   ` Rob Herring (Arm)
2024-12-22  6:39   ` Krzysztof Kozlowski
2024-12-20 10:15 ` [PATCH v2 3/7] dts: arm64: rockchip: Add rk3576 pcie nodes Kever Yang
2024-12-22  6:38   ` Krzysztof Kozlowski
2024-12-23 10:49     ` Kever Yang [this message]
2024-12-23 12:38       ` Heiko Stübner
2024-12-20 10:15 ` [PATCH v2 4/7] arm64: dts: rockchip: add usb related nodes for rk3576 Kever Yang
2024-12-20 10:15 ` [PATCH v2 5/7] dt-bindings: arm: rockchip: Sort for rk3568 evb Kever Yang
2024-12-20 15:08   ` Diederik de Haas
2024-12-20 10:15 ` [PATCH v2 6/7] dt-bindings: arm: rockchip: Add rk3576 evb1 board Kever Yang
2024-12-20 10:15 ` [PATCH v2 7/7] arm64: dts: " Kever Yang

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