From: Florian Fainelli <florian.fainelli@broadcom.com>
To: "Jonas Gorski" <jonas.gorski@gmail.com>,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Andrew Lunn" <andrew@lunn.ch>,
"Vladimir Oltean" <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Vivien Didelot" <vivien.didelot@gmail.com>,
"Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net v2 5/5] net: dsa: b53: do not touch DLL_IQQD on bcm53115
Date: Mon, 2 Jun 2025 14:40:41 -0700 [thread overview]
Message-ID: <c1c3b951-19b8-462a-9dee-a1b893251d6f@broadcom.com> (raw)
In-Reply-To: <20250602193953.1010487-6-jonas.gorski@gmail.com>
On 6/2/25 12:39, Jonas Gorski wrote:
> According to OpenMDK, bit 2 of the RGMII register has a different
> meaning for BCM53115 [1]:
>
> "DLL_IQQD 1: In the IDDQ mode, power is down0: Normal function
> mode"
>
> Configuring RGMII delay works without setting this bit, so let's keep it
> at the default. For other chips, we always set it, so not clearing it
> is not an issue.
>
> One would assume BCM53118 works the same, but OpenMDK is not quite sure
> what this bit actually means [2]:
>
> "BYPASS_IMP_2NS_DEL #1: In the IDDQ mode, power is down#0: Normal
> function mode1: Bypass dll65_2ns_del IP0: Use
> dll65_2ns_del IP"
>
> So lets keep setting it for now.
>
> [1] https://github.com/Broadcom-Network-Switching-Software/OpenMDK/blob/master/cdk/PKG/chip/bcm53115/bcm53115_a0_defs.h#L19871
> [2] https://github.com/Broadcom-Network-Switching-Software/OpenMDK/blob/master/cdk/PKG/chip/bcm53118/bcm53118_a0_defs.h#L14392
>
> Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch")
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> ---
> v1 -> v2:
> * new patch
>
> drivers/net/dsa/b53/b53_common.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c
> index be4493b769f4..862bdccb7439 100644
> --- a/drivers/net/dsa/b53/b53_common.c
> +++ b/drivers/net/dsa/b53/b53_common.c
> @@ -1354,8 +1354,7 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
> * tx_clk aligned timing (restoring to reset defaults)
> */
> b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
> - rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC |
> - RGMII_CTRL_TIMING_SEL);
> + rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
Are not we missing a:
if (dev->chip_id != BCM53115_DEVICE_ID)
rgmii_ctrl &= ~RGMII_CTRL_TIMING_SEL;
here to be strictly identical before/after?
>
> /* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make
> * sure that we enable the port TX clock internal delay to
> @@ -1375,7 +1374,10 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
> rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
> if (interface == PHY_INTERFACE_MODE_RGMII)
> rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
> - rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
> +
> + if (dev->chip_id != BCM53115_DEVICE_ID)
> + rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
> +
> b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
>
> dev_info(ds->dev, "Configured port %d for %s\n", port,
--
Florian
next prev parent reply other threads:[~2025-06-02 21:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-02 19:39 [PATCH net v2 0/5] net: dsa: b53: fix RGMII ports Jonas Gorski
2025-06-02 19:39 ` [PATCH net v2 1/5] net: dsa: b53: do not enable EEE on bcm63xx Jonas Gorski
2025-06-02 19:39 ` [PATCH net v2 2/5] net: dsa: b53: do not enable RGMII delay " Jonas Gorski
2025-06-02 21:38 ` Florian Fainelli
2025-06-02 19:39 ` [PATCH net v2 3/5] net: dsa: b53: do not configure bcm63xx's IMP port interface Jonas Gorski
2025-06-02 21:38 ` Florian Fainelli
2025-06-02 19:39 ` [PATCH net v2 4/5] net: dsa: b53: allow RGMII for bcm63xx RGMII ports Jonas Gorski
2025-06-02 19:39 ` [PATCH net v2 5/5] net: dsa: b53: do not touch DLL_IQQD on bcm53115 Jonas Gorski
2025-06-02 21:40 ` Florian Fainelli [this message]
2025-06-03 6:15 ` Jonas Gorski
2025-06-05 9:06 ` Paolo Abeni
2025-06-05 18:01 ` Florian Fainelli
2025-06-05 9:20 ` [PATCH net v2 0/5] net: dsa: b53: fix RGMII ports patchwork-bot+netdevbpf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c1c3b951-19b8-462a-9dee-a1b893251d6f@broadcom.com \
--to=florian.fainelli@broadcom.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=jonas.gorski@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=noltari@gmail.com \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
--cc=vivien.didelot@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®