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From: Jon Hunter <jonathanh@nvidia.com>
To: "Dmitry Osipenko" <digetx@gmail.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Prashant Gaikwad" <pgaikwad@nvidia.com>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Michał Mirosław" <mirq-linux@rere.qmqm.pl>
Cc: Rob Herring <robh+dt@kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH v8 2/9] clk: tegra: Fix refcounting of gate clocks
Date: Wed, 14 Jul 2021 18:58:58 +0100	[thread overview]
Message-ID: <c3abab78-2172-51b7-88c3-20f69fbec3b5@nvidia.com> (raw)
In-Reply-To: <e61f1ee5-2c1e-7a1b-094e-810a587ce3cd@gmail.com>


On 14/07/2021 12:59, Dmitry Osipenko wrote:
> 14.07.2021 14:48, Jon Hunter пишет:
>>
>> On 16/05/2021 17:30, Dmitry Osipenko wrote:
>>> The refcounting of the gate clocks has a bug causing the enable_refcnt
>>> to underflow when unused clocks are disabled. This happens because clk
>>> provider erroneously bumps the refcount if clock is enabled at a boot
>>> time, which it shouldn't be doing, and it does this only for the gate
>>> clocks, while peripheral clocks are using the same gate ops and the
>>> peripheral clocks are missing the initial bump. Hence the refcount of
>>> the peripheral clocks is 0 when unused clocks are disabled and then the
>>> counter is decremented further by the gate ops, causing the integer
>>> underflow.
>>>
>>> Fix this problem by removing the erroneous bump and by implementing the
>>> disable_unused() callback, which disables the unused gates properly.
>>>
>>> The visible effect of the bug is such that the unused clocks are never
>>> gated if a loaded kernel module grabs the unused clocks and starts to use
>>> them. In practice this shouldn't cause any real problems for the drivers
>>> and boards supported by the kernel today.
>>>
>>> Acked-by: Thierry Reding <treding@nvidia.com>
>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

...

> Seems you'll need to implement the disable_unused() callback for the
> clk_sdmmc_mux to fix it. It's good that this problem has been caught.
> 
> diff --git a/drivers/clk/tegra/clk-sdmmc-mux.c
> b/drivers/clk/tegra/clk-sdmmc-mux.c
> index 316912d3b1a4..4f2c3309eea4 100644
> --- a/drivers/clk/tegra/clk-sdmmc-mux.c
> +++ b/drivers/clk/tegra/clk-sdmmc-mux.c
> @@ -194,6 +194,15 @@ static void clk_sdmmc_mux_disable(struct clk_hw *hw)
>  	gate_ops->disable(gate_hw);
>  }
> 
> +static void clk_sdmmc_mux_disable_unused(struct clk_hw *hw)
> +{
> +	struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
> +	const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
> +	struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
> +
> +	gate_ops->disable_unused(gate_hw);
> +}
> +
>  static void clk_sdmmc_mux_restore_context(struct clk_hw *hw)
>  {
>  	struct clk_hw *parent = clk_hw_get_parent(hw);
> @@ -218,6 +227,7 @@ static const struct clk_ops tegra_clk_sdmmc_mux_ops = {
>  	.is_enabled = clk_sdmmc_mux_is_enabled,
>  	.enable = clk_sdmmc_mux_enable,
>  	.disable = clk_sdmmc_mux_disable,
> +	.disable_unused = clk_sdmmc_mux_disable_unused,
>  	.restore_context = clk_sdmmc_mux_restore_context,
>  };
> 


Thanks, that fixes it! Please feel free to add my test-by and acked-by
when you send out the patch.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>

Cheers!
Jon

-- 
nvpublic

  parent reply	other threads:[~2021-07-14 17:59 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-16 16:30 [PATCH v8 0/9] Couple improvements for Tegra clk driver Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 1/9] clk: tegra30: Use 300MHz for video decoder by default Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 2/9] clk: tegra: Fix refcounting of gate clocks Dmitry Osipenko
2021-07-14 11:48   ` Jon Hunter
2021-07-14 11:59     ` Dmitry Osipenko
2021-07-14 15:13       ` Dmitry Osipenko
2021-07-14 17:58       ` Jon Hunter [this message]
2021-05-16 16:30 ` [PATCH v8 3/9] clk: tegra: Ensure that PLLU configuration is applied properly Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 4/9] clk: tegra: Halve SCLK rate on Tegra20 Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 5/9] clk: tegra: Don't allow zero clock rate for PLLs Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 6/9] clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 7/9] clk: tegra: Mark external clocks as not having reset control Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 8/9] clk: tegra: Don't deassert reset on enabling clocks Dmitry Osipenko
2021-05-16 16:30 ` [PATCH v8 9/9] dt-bindings: clock: tegra: Convert to schema Dmitry Osipenko
2021-05-17  2:27   ` Rob Herring
2021-05-31 13:20 ` (subset) [PATCH v8 0/9] Couple improvements for Tegra clk driver Thierry Reding
2021-05-31 13:20 ` Thierry Reding

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