* [PATCH v9 1/3] arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address
2026-09-12 14:47 [PATCH v9 0/3] Add DT Support for USB on Shikra Komal Bajaj
@ 2026-09-12 14:47 ` Komal Bajaj
2026-09-14 10:57 ` Konrad Dybcio
2026-09-12 14:47 ` [PATCH v9 2/3] arm64: dts: qcom: Add support for usb nodes on Shikra Komal Bajaj
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Komal Bajaj @ 2026-09-12 14:47 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Konrad Dybcio, Manivannan Sadhasivam,
Krishna Kurapati, Komal Bajaj
Sort /soc@0 subnodes in ascending order of unit address.
Reorder the misplaced nodes so their declaration order matches
increasing node addresses.
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra.dtsi | 350 +++++++++++++++++------------------
1 file changed, 175 insertions(+), 175 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index c1f06f692f66..921ae2a5a3eb 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -1234,6 +1234,17 @@ opp-384000000 {
};
};
+ sdhc_ice: crypto@4748000 {
+ compatible = "qcom,shikra-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0x0 0x04748000 0x0 0x18000>;
+ clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>;
+ clock-names = "core",
+ "iface";
+ power-domains = <&rpmpd RPMHPD_CX>;
+ };
+
gpi_dma0: dma-controller@4a00000 {
compatible = "qcom,shikra-gpi-dma", "qcom,sm6350-gpi-dma";
reg = <0x0 0x04a00000 0x0 0x60000>;
@@ -1262,17 +1273,6 @@ gpi_dma0: dma-controller@4a00000 {
iommus = <&apps_smmu 0xf6 0x0>;
};
- sdhc_ice: crypto@4748000 {
- compatible = "qcom,shikra-inline-crypto-engine",
- "qcom,inline-crypto-engine";
- reg = <0x0 0x04748000 0x0 0x18000>;
- clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>,
- <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core",
- "iface";
- power-domains = <&rpmpd RPMHPD_CX>;
- };
-
qupv3_0: geniqup@4ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x04ac0000 0x0 0x2000>;
@@ -1977,170 +1977,6 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
};
};
- remoteproc_mpss: remoteproc@6080000 {
- compatible = "qcom,shikra-mpss-pas";
- reg = <0x0 0x06080000 0x0 0x100>;
-
- interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING 0>,
- <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog",
- "fatal",
- "ready",
- "handover",
- "stop-ack",
- "shutdown-ack";
-
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "xo";
-
- interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
- &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
-
- power-domains = <&rpmpd RPMHPD_CX>;
-
- memory-region = <&mpss_wlan_mem>;
-
- qcom,smem-states = <&modem_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING 0>;
- mboxes = <&apcs_glb 12>;
- qcom,remote-pid = <1>;
- label = "mpss";
- };
- };
-
- remoteproc_cdsp: remoteproc@b300000 {
- compatible = "qcom,shikra-cdsp-pas";
- reg = <0x0 0x0b300000 0x0 0x100000>;
-
- interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING 0>,
- <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog",
- "fatal",
- "ready",
- "handover",
- "stop-ack",
- "shutdown-ack";
-
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "xo";
-
- interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
- &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
-
- power-domains = <&rpmpd RPMHPD_CX>;
-
- memory-region = <&cdsp_mem>;
-
- qcom,smem-states = <&cdsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 261 IRQ_TYPE_EDGE_RISING 0>;
- mboxes = <&apcs_glb 4>;
- qcom,remote-pid = <5>;
- label = "cdsp";
-
- fastrpc {
- compatible = "qcom,fastrpc";
- #address-cells = <1>;
- #size-cells = <0>;
- label = "cdsp";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
-
- compute-cb@1 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <1>;
- iommus = <&apps_smmu 0x0201 0x0000>;
- };
-
- compute-cb@2 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <2>;
- iommus = <&apps_smmu 0x0202 0x0000>;
- };
-
- compute-cb@3 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <3>;
- iommus = <&apps_smmu 0x0203 0x0000>;
- };
-
- compute-cb@4 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <4>;
- iommus = <&apps_smmu 0x0204 0x0000>;
- };
-
- compute-cb@5 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <5>;
- iommus = <&apps_smmu 0x0205 0x0000>;
- };
-
- compute-cb@6 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <6>;
- iommus = <&apps_smmu 0x0206 0x0000>;
- };
-
- compute-cb@9 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <9>;
- iommus = <&apps_smmu 0x0209 0x0000>;
- };
- };
- };
- };
-
- remoteproc_lpaicp: remoteproc@b800000 {
- compatible = "qcom,shikra-lpaicp-pas";
- reg = <0x0 0x0b800000 0x0 0x200000>;
-
- interrupts-extended = <&intc GIC_SPI 257 IRQ_TYPE_EDGE_RISING 0>,
- <&lmcu_smp2p_in 0 IRQ_TYPE_NONE>,
- <&lmcu_smp2p_in 1 IRQ_TYPE_NONE>,
- <&lmcu_smp2p_in 2 IRQ_TYPE_NONE>,
- <&lmcu_smp2p_in 3 IRQ_TYPE_NONE>;
-
- interrupt-names = "wdog",
- "fatal",
- "ready",
- "handover",
- "stop-ack";
-
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "xo";
-
- memory-region = <&lmcu_mem &lmcu_dtb_mem>;
-
- qcom,smem-states = <&lmcu_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING 0>;
- mboxes = <&apcs_glb 9>;
- qcom,remote-pid = <26>;
- label = "lpaicp";
- };
- };
-
gpu: gpu@5900000 {
compatible = "qcom,adreno-07000400", "qcom,adreno";
reg = <0x0 0x05900000 0x0 0x40000>,
@@ -2302,6 +2138,46 @@ dispcc: clock-controller@5f00000 {
#power-domain-cells = <1>;
};
+ remoteproc_mpss: remoteproc@6080000 {
+ compatible = "qcom,shikra-mpss-pas";
+ reg = <0x0 0x06080000 0x0 0x100>;
+
+ interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING 0>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "xo";
+
+ interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+ &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+
+ power-domains = <&rpmpd RPMHPD_CX>;
+
+ memory-region = <&mpss_wlan_mem>;
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING 0>;
+ mboxes = <&apcs_glb 12>;
+ qcom,remote-pid = <1>;
+ label = "mpss";
+ };
+ };
+
ctcu@8001000 {
compatible = "qcom,shikra-ctcu", "qcom,sa8775p-ctcu";
reg = <0x0 0x08001000 0x0 0x1000>;
@@ -3485,6 +3361,130 @@ cti@9900000 {
label = "cti_apss_2";
};
+ remoteproc_cdsp: remoteproc@b300000 {
+ compatible = "qcom,shikra-cdsp-pas";
+ reg = <0x0 0x0b300000 0x0 0x100000>;
+
+ interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING 0>,
+ <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "xo";
+
+ interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
+ &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+
+ power-domains = <&rpmpd RPMHPD_CX>;
+
+ memory-region = <&cdsp_mem>;
+
+ qcom,smem-states = <&cdsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 261 IRQ_TYPE_EDGE_RISING 0>;
+ mboxes = <&apcs_glb 4>;
+ qcom,remote-pid = <5>;
+ label = "cdsp";
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ label = "cdsp";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x0201 0x0000>;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x0202 0x0000>;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x0203 0x0000>;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x0204 0x0000>;
+ };
+
+ compute-cb@5 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x0205 0x0000>;
+ };
+
+ compute-cb@6 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x0206 0x0000>;
+ };
+
+ compute-cb@9 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <9>;
+ iommus = <&apps_smmu 0x0209 0x0000>;
+ };
+ };
+ };
+ };
+
+ remoteproc_lpaicp: remoteproc@b800000 {
+ compatible = "qcom,shikra-lpaicp-pas";
+ reg = <0x0 0x0b800000 0x0 0x200000>;
+
+ interrupts-extended = <&intc GIC_SPI 257 IRQ_TYPE_EDGE_RISING 0>,
+ <&lmcu_smp2p_in 0 IRQ_TYPE_NONE>,
+ <&lmcu_smp2p_in 1 IRQ_TYPE_NONE>,
+ <&lmcu_smp2p_in 2 IRQ_TYPE_NONE>,
+ <&lmcu_smp2p_in 3 IRQ_TYPE_NONE>;
+
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "xo";
+
+ memory-region = <&lmcu_mem &lmcu_dtb_mem>;
+
+ qcom,smem-states = <&lmcu_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING 0>;
+ mboxes = <&apcs_glb 9>;
+ qcom,remote-pid = <26>;
+ label = "lpaicp";
+ };
+ };
+
sram@c11e000 {
compatible = "qcom,shikra-imem", "mmio-sram";
reg = <0x0 0x0c11e000 0x0 0x1000>;
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v9 1/3] arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address
2026-09-12 14:47 ` [PATCH v9 1/3] arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address Komal Bajaj
@ 2026-09-14 10:57 ` Konrad Dybcio
0 siblings, 0 replies; 7+ messages in thread
From: Konrad Dybcio @ 2026-09-14 10:57 UTC (permalink / raw)
To: Komal Bajaj, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Manivannan Sadhasivam, Krishna Kurapati
On 9/12/26 4:47 PM, Komal Bajaj wrote:
> Sort /soc@0 subnodes in ascending order of unit address.
> Reorder the misplaced nodes so their declaration order matches
> increasing node addresses.
>
> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v9 2/3] arm64: dts: qcom: Add support for usb nodes on Shikra
2026-09-12 14:47 [PATCH v9 0/3] Add DT Support for USB on Shikra Komal Bajaj
2026-09-12 14:47 ` [PATCH v9 1/3] arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address Komal Bajaj
@ 2026-09-12 14:47 ` Komal Bajaj
2026-09-12 14:47 ` [PATCH v9 3/3] arm64: dts: qcom: shikra: Enable USB controllers and primary Type-C support Komal Bajaj
2026-10-01 15:02 ` [PATCH v9 0/3] Add DT Support for USB on Shikra Bjorn Andersson
3 siblings, 0 replies; 7+ messages in thread
From: Komal Bajaj @ 2026-09-12 14:47 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Konrad Dybcio, Manivannan Sadhasivam,
Krishna Kurapati, Komal Bajaj
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Add support for both USB controllers and their respective phys on Shikra.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra.dtsi | 233 +++++++++++++++++++++++++++++++++++
1 file changed, 233 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 921ae2a5a3eb..1395c182a2b1 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/interconnect/qcom,rpm-icc.h>
#include <dt-bindings/interconnect/qcom,shikra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/thermal/thermal.h>
@@ -1019,6 +1020,85 @@ gcc: clock-controller@1400000 {
#power-domain-cells = <1>;
};
+ usb_1_hsphy: phy@1613000 {
+ compatible = "qcom,shikra-qusb2-phy";
+ reg = <0x0 0x01613000 0x0 0x180>;
+
+ clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+ nvmem-cells = <&qusb2_hstx_trim_1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ usb_qmpphy: phy@1615000 {
+ compatible = "qcom,shikra-qmp-usb3-dp-phy";
+ reg = <0x0 0x01615000 0x0 0x2000>;
+
+ clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_CLKREF_EN>,
+ <&gcc GCC_AHB2PHY_USB_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "ref",
+ "cfg_ahb",
+ "pipe";
+
+ resets = <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>,
+ <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
+ <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>;
+ reset-names = "phy_phy",
+ "dp_phy",
+ "phy";
+
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ orientation-switch;
+
+ qcom,tcsr-reg = <&tcsr_regs 0xb244 0xb248>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_qmpphy_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
+ };
+ };
+ };
+ };
+
+ usb_2_hsphy: phy@1617000 {
+ compatible = "qcom,shikra-qusb2-phy";
+ reg = <0x0 0x01617000 0x0 0x180>;
+
+ clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+ nvmem-cells = <&qusb2_hstx_trim_2>;
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
system_noc: interconnect@1880000 {
compatible = "qcom,shikra-sys-noc";
reg = <0x0 0x01880000 0x0 0x6a080>;
@@ -1100,6 +1180,11 @@ qfprom: efuse@1b44000 {
#address-cells = <1>;
#size-cells = <1>;
+ qusb2_hstx_trim_2: hstx-trim@25a {
+ reg = <0x25a 0x1>;
+ bits = <4 4>;
+ };
+
qusb2_hstx_trim_1: hstx-trim@25b {
reg = <0x25b 0x1>;
bits = <1 4>;
@@ -1977,6 +2062,154 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
};
};
+ usb_2: usb@4c00000 {
+ compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
+ reg = <0x0 0x04c00000 0x0 0xfc100>;
+
+ clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>,
+ <&gcc GCC_SYS_NOC_USB2_PRIM_AXI_CLK>,
+ <&gcc GCC_USB20_SLEEP_CLK>,
+ <&gcc GCC_USB20_MOCK_UTMI_CLK>;
+ clock-names = "cfg_noc",
+ "core",
+ "iface",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB20_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <133333333>;
+
+ interrupts-extended = <&intc GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&intc GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&intc GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&mpm 59 IRQ_TYPE_LEVEL_HIGH>,
+ <&mpm 58 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "hs_phy_irq",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
+
+ iommus = <&apps_smmu 0x140 0x0>;
+
+ maximum-speed = "high-speed";
+
+ phys = <&usb_2_hsphy>;
+ phy-names = "usb2-phy";
+
+ power-domains = <&gcc GCC_USB20_GDSC>;
+
+ qcom,select-utmi-as-pipe-clk;
+ resets = <&gcc GCC_USB20_BCR>;
+
+ interconnects = <&system_noc MASTER_USB2_0 RPM_ALWAYS_TAG
+ &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+ <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG
+ &config_noc SLAVE_USB2 RPM_ACTIVE_TAG>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
+ snps,dis_u2_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,has-lpm-erratum;
+ snps,hird-threshold = /bits/ 8 <0x10>;
+
+ usb-role-switch;
+ wakeup-source;
+
+ status = "disabled";
+
+ port {
+ usb_2_dwc3_hs: endpoint {
+ };
+ };
+ };
+
+ usb_1: usb@4e00000 {
+ compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
+ reg = <0x0 0x04e00000 0x0 0xfc100>;
+
+ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+ <&gcc GCC_USB30_PRIM_MASTER_CLK>,
+ <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
+ <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+ <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
+ clock-names = "cfg_noc",
+ "core",
+ "iface",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_PRIM_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <133333333>;
+
+ interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>,
+ <&mpm 91 IRQ_TYPE_LEVEL_HIGH>,
+ <&mpm 90 IRQ_TYPE_LEVEL_HIGH>,
+ <&mpm 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "hs_phy_irq",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq",
+ "ss_phy_irq";
+
+ iommus = <&apps_smmu 0x120 0x0>;
+
+ phys = <&usb_1_hsphy>, <&usb_qmpphy QMP_USB43DP_USB3_PHY>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
+
+ resets = <&gcc GCC_USB30_PRIM_BCR>;
+
+ interconnects = <&system_noc MASTER_USB3 RPM_ALWAYS_TAG
+ &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
+ <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG
+ &config_noc SLAVE_USB3 RPM_ACTIVE_TAG>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis_enblslpm_quirk;
+ snps,has-lpm-erratum;
+ snps,hird-threshold = /bits/ 8 <0x10>;
+ snps,usb3_lpm_capable;
+ snps,parkmode-disable-ss-quirk;
+
+ usb-role-switch;
+
+ wakeup-source;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_qmpphy_usb_ss_in>;
+ };
+ };
+ };
+ };
+
gpu: gpu@5900000 {
compatible = "qcom,adreno-07000400", "qcom,adreno";
reg = <0x0 0x05900000 0x0 0x40000>,
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v9 3/3] arm64: dts: qcom: shikra: Enable USB controllers and primary Type-C support
2026-09-12 14:47 [PATCH v9 0/3] Add DT Support for USB on Shikra Komal Bajaj
2026-09-12 14:47 ` [PATCH v9 1/3] arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address Komal Bajaj
2026-09-12 14:47 ` [PATCH v9 2/3] arm64: dts: qcom: Add support for usb nodes on Shikra Komal Bajaj
@ 2026-09-12 14:47 ` Komal Bajaj
2026-10-01 15:02 ` [PATCH v9 0/3] Add DT Support for USB on Shikra Bjorn Andersson
3 siblings, 0 replies; 7+ messages in thread
From: Komal Bajaj @ 2026-09-12 14:47 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Konrad Dybcio, Manivannan Sadhasivam,
Krishna Kurapati, Komal Bajaj, Rakesh Kota
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Enable USB controller nodes across Shikra platform device trees and add
primary Type-C controller wiring for CQM/CQS variants.
- Enable USB controller blocks for shikra-cqm-evk, shikra-cqs-evk
and shikra-iqs-evk
- Add Type-C support on the primary controller for CQM/CQS boards,
including role-switch and connector integration
Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 43 ++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 41 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 43 ++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/shikra-evk.dtsi | 12 ++++++++
arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 23 +++++++++++++++
5 files changed, 162 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
index b112b21b1d79..2d26435b257a 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
@@ -23,6 +23,14 @@ chosen {
};
};
+&pm4125_hs_in {
+ remote-endpoint = <&usb_1_dwc3_hs>;
+};
+
+&pm4125_ss_in {
+ remote-endpoint = <&usb_qmpphy_out>;
+};
+
&remoteproc_cdsp {
firmware-name = "qcom/shikra/cdsp.mbn";
@@ -57,3 +65,38 @@ &sdhc_1 {
status = "okay";
};
+
+&usb_1 {
+ dr_mode = "otg";
+};
+
+&usb_1_dwc3_hs {
+ remote-endpoint = <&pm4125_hs_in>;
+};
+
+&usb_1_hsphy {
+ vdd-supply = <&pm4125_l12>;
+ vdda-pll-supply = <&pm4125_l13>;
+ vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+ status = "okay";
+};
+
+&usb_2_hsphy {
+ vdd-supply = <&pm4125_l12>;
+ vdda-pll-supply = <&pm4125_l13>;
+ vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+ status = "okay";
+};
+
+&usb_qmpphy {
+ vdda-phy-supply = <&pm4125_l8>;
+ vdda-pll-supply = <&pm4125_l13>;
+
+ status = "okay";
+};
+
+&usb_qmpphy_out {
+ remote-endpoint = <&pm4125_ss_in>;
+};
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index fde7fc035bf5..541ba278bb2e 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -85,6 +85,47 @@ &pm4125_resin {
status = "okay";
};
+&pm4125_typec {
+ status = "okay";
+
+ connector {
+ compatible = "usb-c-connector";
+
+ power-role = "dual";
+ data-role = "dual";
+ self-powered;
+
+ vbus-supply = <&pm4125_vbus>;
+
+ typec-power-opmode = "default";
+ pd-disable;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pm4125_hs_in: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pm4125_ss_in: endpoint {
+ };
+ };
+ };
+ };
+};
+
+&pm4125_vbus {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ status = "okay";
+};
+
&pm8005_regulators {
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
index e62ba5aef71f..fcafd8aa6384 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
@@ -23,6 +23,14 @@ chosen {
};
};
+&pm4125_hs_in {
+ remote-endpoint = <&usb_1_dwc3_hs>;
+};
+
+&pm4125_ss_in {
+ remote-endpoint = <&usb_qmpphy_out>;
+};
+
&remoteproc_cdsp {
firmware-name = "qcom/shikra/cdsp.mbn";
@@ -57,3 +65,38 @@ &sdhc_1 {
status = "okay";
};
+
+&usb_1 {
+ dr_mode = "otg";
+};
+
+&usb_1_dwc3_hs {
+ remote-endpoint = <&pm4125_hs_in>;
+};
+
+&usb_1_hsphy {
+ vdd-supply = <&pm4125_l12>;
+ vdda-pll-supply = <&pm4125_l13>;
+ vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+ status = "okay";
+};
+
+&usb_2_hsphy {
+ vdd-supply = <&pm4125_l12>;
+ vdda-pll-supply = <&pm4125_l13>;
+ vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+ status = "okay";
+};
+
+&usb_qmpphy {
+ vdda-phy-supply = <&pm4125_l8>;
+ vdda-pll-supply = <&pm4125_l13>;
+
+ status = "okay";
+};
+
+&usb_qmpphy_out {
+ remote-endpoint = <&pm4125_ss_in>;
+};
diff --git a/arch/arm64/boot/dts/qcom/shikra-evk.dtsi b/arch/arm64/boot/dts/qcom/shikra-evk.dtsi
index 4b9452d9e93f..7cdbd257e9c9 100644
--- a/arch/arm64/boot/dts/qcom/shikra-evk.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-evk.dtsi
@@ -20,3 +20,15 @@ &qupv3_0 {
&uart0 {
status = "okay";
};
+
+&usb_1 {
+ dr_mode = "peripheral";
+
+ status = "okay";
+};
+
+&usb_2 {
+ dr_mode = "peripheral";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
index 727809430fd1..779b9582c011 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
@@ -57,3 +57,26 @@ &sdhc_1 {
status = "okay";
};
+
+&usb_1_hsphy {
+ vdd-supply = <&pm8150_l4>;
+ vdda-pll-supply = <&pm8150_l12>;
+ vdda-phy-dpdm-supply = <&pm8150_l13>;
+
+ status = "okay";
+};
+
+&usb_2_hsphy {
+ vdd-supply = <&pm8150_l4>;
+ vdda-pll-supply = <&pm8150_l12>;
+ vdda-phy-dpdm-supply = <&pm8150_l13>;
+
+ status = "okay";
+};
+
+&usb_qmpphy {
+ vdda-phy-supply = <&pm8150_l6>;
+ vdda-pll-supply = <&pm8150_l12>;
+
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v9 0/3] Add DT Support for USB on Shikra
2026-09-12 14:47 [PATCH v9 0/3] Add DT Support for USB on Shikra Komal Bajaj
` (2 preceding siblings ...)
2026-09-12 14:47 ` [PATCH v9 3/3] arm64: dts: qcom: shikra: Enable USB controllers and primary Type-C support Komal Bajaj
@ 2026-10-01 15:02 ` Bjorn Andersson
2026-10-05 10:09 ` Komal Bajaj
3 siblings, 1 reply; 7+ messages in thread
From: Bjorn Andersson @ 2026-10-01 15:02 UTC (permalink / raw)
To: Komal Bajaj
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Konrad Dybcio, Manivannan Sadhasivam,
Krishna Kurapati, Rakesh Kota
On Sat, Sep 12, 2026 at 08:17:00PM +0530, Komal Bajaj wrote:
> Shikra has two USB controllers. Adding both USB controllers support
> in device mode in this series. Also squashing Type-C enablement on
> CQS/CQM platforms [1] into base USB enablement changes on these
> platforms [2] based on feedback to squash related subsystem changes.
>
> While at it, also sorting subnodes under soc@0 for consistency.
>
When you repackage scattered patches like this into new series patchwork
is often unable to determine that these patches supersed the previous
version.
The result is that for each patch I now have (at least) 2 similar and
conflicting patches in my queue. As the patches was altered to the point
that patchwork doesn't detect it and nobody told me that the previous
versions are no longer to be considered, we now manually have to spend
time to detangle this.
In other words, this series doesn't apply - please determine if there
are any remaining parts of these changes that isn't accounted for in
linux-next and resubmit those.
Regards,
Bjorn
> [1]: https://lore.kernel.org/all/20260818-pm4125_typec_changes-v1-1-6e6ede93db19@oss.qualcomm.com/
> [2]: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-2-753e928f37ae@oss.qualcomm.com/
>
> Changes in v9:
> - Move usb_2_hsphy above usb_qmpphy to maintain alphabetical ordering
>
> Link to v8:
> https://lore.kernel.org/r/20260911-usb-shikra-v7-v8-0-851ee4bc0eec@oss.qualcomm.com
>
> Changes in v8:
> - Rebase on top of latest linux-next branch
> - Sort /soc@0 subnodes in ascending order of unit address
> - Squashed with Type-C support change
> - Individual patches were previously reviewed by Abel, Dmitry, Konrad and
> Mani; however, those reviews do not apply to the squashed commit and
> are therefore being dropped
>
> Link to v7:
> https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/
>
> Changes in v7:
> - Rebased on top of latest for-next branch
> - Added Mani's tag from cover letter to both the induvidual patches.
>
> Link to v6:
> https://lore.kernel.org/all/20260729-shikra-usb-v6-dt-v6-0-72ffb4796a08@oss.qualcomm.com/
>
> Changes in v6:
> - Moved dr_mode property to shikra-evk.dtsi
> - Merged platform specific changes into one patch
>
> Link to v5:
> https://lore.kernel.org/all/20260723-usb-shikra-dt-v4-v5-0-5b69d9eb0888@oss.qualcomm.com/
>
> Changes in v5:
> - Added interconnects and sorted nodes alphanumerically - Dmitry
> - Updated commit text mentioning that device mode is being enabled
> since role switching changes are not yet present.
>
> Link to v4:
> https://patch.msgid.link/20260721-usb-shikra-dt-v4-v4-0-2e7a092d7f27@oss.qualcomm.com
>
> Changes in v4:
> - Enable both controllers in CQS/CQM platform
> - Fixed iface clock in usb_2 node
> - Skipped adding RB tags obtained from Konrad since on CQM/CQS, second
> controller also is enabled in v4. Also specified dr_mode as peripheral
> for first controller.
>
> Link to v3:
> https://lore.kernel.org/all/20260716-shikra-usb-dt-v3-v3-0-13f73a0571bb@oss.qualcomm.com/
>
> Changes in v3:
> - USB changes were sent as part of consolidated submission in v2, but
> they were later dropped since bindings had to be updated.
> - Remove double vote on USB3_PRIM_CLKREF and also removed xo clock.
> - Uses &mpm as interrupt reference (sashiko bot)
>
> Link to v2:
> https://lore.kernel.org/all/20260519-shikra-dt-v2-0-c01b90fb4395@oss.qualcomm.com/
>
> Changes in v2:
> - Moved to using mpm interrupt handler for ss phy irq (sashiko bot)
>
> Link to v1:
> https://lore.kernel.org/all/20260512-shikra-dt-v1-0-716438330dd0@oss.qualcomm.com/
>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
> ---
> Komal Bajaj (1):
> arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address
>
> Krishna Kurapati (2):
> arm64: dts: qcom: Add support for usb nodes on Shikra
> arm64: dts: qcom: shikra: Enable USB controllers and primary Type-C support
>
> arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 43 +++
> arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 41 +++
> arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 43 +++
> arch/arm64/boot/dts/qcom/shikra-evk.dtsi | 12 +
> arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 23 ++
> arch/arm64/boot/dts/qcom/shikra.dtsi | 515 +++++++++++++++++++--------
> 6 files changed, 536 insertions(+), 141 deletions(-)
> ---
> base-commit: f2bfbc3554ca6919484030729424b9dee2942d24
> change-id: 20260811-usb-shikra-v7-2dc0d3afc3d4
>
> Best regards,
> --
> Komal Bajaj <komal.bajaj@oss.qualcomm.com>
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v9 0/3] Add DT Support for USB on Shikra
2026-10-01 15:02 ` [PATCH v9 0/3] Add DT Support for USB on Shikra Bjorn Andersson
@ 2026-10-05 10:09 ` Komal Bajaj
0 siblings, 0 replies; 7+ messages in thread
From: Komal Bajaj @ 2026-10-05 10:09 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Abel Vesa,
Dmitry Baryshkov, Konrad Dybcio, Manivannan Sadhasivam,
Krishna Kurapati, Rakesh Kota
On 10/1/2026 8:32 PM, Bjorn Andersson wrote:
> On Sat, Sep 12, 2026 at 08:17:00PM +0530, Komal Bajaj wrote:
>> Shikra has two USB controllers. Adding both USB controllers support
>> in device mode in this series. Also squashing Type-C enablement on
>> CQS/CQM platforms [1] into base USB enablement changes on these
>> platforms [2] based on feedback to squash related subsystem changes.
>>
>> While at it, also sorting subnodes under soc@0 for consistency.
>>
> When you repackage scattered patches like this into new series patchwork
> is often unable to determine that these patches supersed the previous
> version.
>
> The result is that for each patch I now have (at least) 2 similar and
> conflicting patches in my queue. As the patches was altered to the point
> that patchwork doesn't detect it and nobody told me that the previous
> versions are no longer to be considered, we now manually have to spend
> time to detangle this.
I understand your concern, and thank you for pointing this out.
By repackaging patches into a new series, I should have made it explicit
that the previous submissions were superseded. I will keep this in mid
for future submissions.
>
> In other words, this series doesn't apply - please determine if there
> are any remaining parts of these changes that isn't accounted for in
> linux-next and resubmit those.
I see that one of the patches has already been merged into linux-next. I
will review the remaining changes and resubmit only those that are not
yet applied.
Thanks
Komal
>
> Regards,
> Bjorn
>
>> [1]: https://lore.kernel.org/all/20260818-pm4125_typec_changes-v1-1-6e6ede93db19@oss.qualcomm.com/
>> [2]: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-2-753e928f37ae@oss.qualcomm.com/
>>
>> Changes in v9:
>> - Move usb_2_hsphy above usb_qmpphy to maintain alphabetical ordering
>>
>> Link to v8:
>> https://lore.kernel.org/r/20260911-usb-shikra-v7-v8-0-851ee4bc0eec@oss.qualcomm.com
>>
>> Changes in v8:
>> - Rebase on top of latest linux-next branch
>> - Sort /soc@0 subnodes in ascending order of unit address
>> - Squashed with Type-C support change
>> - Individual patches were previously reviewed by Abel, Dmitry, Konrad and
>> Mani; however, those reviews do not apply to the squashed commit and
>> are therefore being dropped
>>
>> Link to v7:
>> https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/
>>
>> Changes in v7:
>> - Rebased on top of latest for-next branch
>> - Added Mani's tag from cover letter to both the induvidual patches.
>>
>> Link to v6:
>> https://lore.kernel.org/all/20260729-shikra-usb-v6-dt-v6-0-72ffb4796a08@oss.qualcomm.com/
>>
>> Changes in v6:
>> - Moved dr_mode property to shikra-evk.dtsi
>> - Merged platform specific changes into one patch
>>
>> Link to v5:
>> https://lore.kernel.org/all/20260723-usb-shikra-dt-v4-v5-0-5b69d9eb0888@oss.qualcomm.com/
>>
>> Changes in v5:
>> - Added interconnects and sorted nodes alphanumerically - Dmitry
>> - Updated commit text mentioning that device mode is being enabled
>> since role switching changes are not yet present.
>>
>> Link to v4:
>> https://patch.msgid.link/20260721-usb-shikra-dt-v4-v4-0-2e7a092d7f27@oss.qualcomm.com
>>
>> Changes in v4:
>> - Enable both controllers in CQS/CQM platform
>> - Fixed iface clock in usb_2 node
>> - Skipped adding RB tags obtained from Konrad since on CQM/CQS, second
>> controller also is enabled in v4. Also specified dr_mode as peripheral
>> for first controller.
>>
>> Link to v3:
>> https://lore.kernel.org/all/20260716-shikra-usb-dt-v3-v3-0-13f73a0571bb@oss.qualcomm.com/
>>
>> Changes in v3:
>> - USB changes were sent as part of consolidated submission in v2, but
>> they were later dropped since bindings had to be updated.
>> - Remove double vote on USB3_PRIM_CLKREF and also removed xo clock.
>> - Uses &mpm as interrupt reference (sashiko bot)
>>
>> Link to v2:
>> https://lore.kernel.org/all/20260519-shikra-dt-v2-0-c01b90fb4395@oss.qualcomm.com/
>>
>> Changes in v2:
>> - Moved to using mpm interrupt handler for ss phy irq (sashiko bot)
>>
>> Link to v1:
>> https://lore.kernel.org/all/20260512-shikra-dt-v1-0-716438330dd0@oss.qualcomm.com/
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
>> ---
>> Komal Bajaj (1):
>> arm64: dts: qcom: shikra: sort /soc@0 nodes by unit address
>>
>> Krishna Kurapati (2):
>> arm64: dts: qcom: Add support for usb nodes on Shikra
>> arm64: dts: qcom: shikra: Enable USB controllers and primary Type-C support
>>
>> arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 43 +++
>> arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 41 +++
>> arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 43 +++
>> arch/arm64/boot/dts/qcom/shikra-evk.dtsi | 12 +
>> arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 23 ++
>> arch/arm64/boot/dts/qcom/shikra.dtsi | 515 +++++++++++++++++++--------
>> 6 files changed, 536 insertions(+), 141 deletions(-)
>> ---
>> base-commit: f2bfbc3554ca6919484030729424b9dee2942d24
>> change-id: 20260811-usb-shikra-v7-2dc0d3afc3d4
>>
>> Best regards,
>> --
>> Komal Bajaj <komal.bajaj@oss.qualcomm.com>
>>
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