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From: Steven Price <steven.price@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
	kvm@vger.kernel.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
	James Morse <james.morse@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Fuad Tabba <tabba@google.com>,
	linux-coco@lists.linux.dev,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	Gavin Shan <gshan@redhat.com>,
	Shanker Donthineni <sdonthineni@nvidia.com>,
	Alper Gun <alpergun@google.com>,
	"Aneesh Kumar K . V" <aneesh.kumar@kernel.org>
Subject: Re: [PATCH v8 20/43] arm64: RME: Runtime faulting of memory
Date: Wed, 21 May 2025 10:10:46 +0100	[thread overview]
Message-ID: <c6ae4a77-6477-4e37-bca7-1ddfdfbce803@arm.com> (raw)
In-Reply-To: <3a04995a-524c-4d07-8c8b-82930f9bca72@arm.com>

On 19/05/2025 18:35, Suzuki K Poulose wrote:
> Hi Steven
> 
> On 16/04/2025 14:41, Steven Price wrote:
>> At runtime if the realm guest accesses memory which hasn't yet been
>> mapped then KVM needs to either populate the region or fault the guest.
>>
>> For memory in the lower (protected) region of IPA a fresh page is
>> provided to the RMM which will zero the contents. For memory in the
>> upper (shared) region of IPA, the memory from the memslot is mapped
>> into the realm VM non secure.
>>
>> Signed-off-by: Steven Price <steven.price@arm.com>
> 
> Please find some comments below.
> 
> ...
> 
>> diff --git a/arch/arm64/kvm/rme.c b/arch/arm64/kvm/rme.c
>> index f6af3ea6ea8a..b6959cd17a6c 100644
>> --- a/arch/arm64/kvm/rme.c
>> +++ b/arch/arm64/kvm/rme.c
>> @@ -714,6 +714,186 @@ static int
>> realm_create_protected_data_page(struct realm *realm,
>>       return -ENXIO;
>>   }
>>   +static int fold_rtt(struct realm *realm, unsigned long addr, int
>> level)
>> +{
>> +    phys_addr_t rtt_addr;
>> +    int ret;
>> +
>> +    ret = realm_rtt_fold(realm, addr, level, &rtt_addr);
>> +    if (ret)
>> +        return ret;
>> +
>> +    free_delegated_granule(rtt_addr);
>> +
>> +    return 0;
>> +}
>> +
>> +int realm_map_protected(struct realm *realm,
>> +            unsigned long ipa,
>> +            kvm_pfn_t pfn,
>> +            unsigned long map_size,
>> +            struct kvm_mmu_memory_cache *memcache)
>> +{
>> +    phys_addr_t phys = __pfn_to_phys(pfn);
>> +    phys_addr_t rd = virt_to_phys(realm->rd);
>> +    unsigned long base_ipa = ipa;
>> +    unsigned long size;
>> +    int map_level;
>> +    int ret = 0;
>> +
>> +    if (WARN_ON(!IS_ALIGNED(map_size, RMM_PAGE_SIZE)))
>> +        return -EINVAL;
>> +
>> +    if (WARN_ON(!IS_ALIGNED(ipa, map_size)))
>> +        return -EINVAL;
>> +
>> +    if (IS_ALIGNED(map_size, RMM_L2_BLOCK_SIZE))
>> +        map_level = 2;
> 
> minor nit : RMM_RTT_BLOCK_LEVEL
> 
>> +    else
>> +        map_level = 3;
> 
> minor nit:  RMM_RTT_MAX_LEVEL ?

Ack

>> +
>> +    if (map_level < RMM_RTT_MAX_LEVEL) {
>> +        /*
>> +         * A temporary RTT is needed during the map, precreate it,
>> +         * however if there is an error (e.g. missing parent tables)
>> +         * this will be handled below.
>> +         */
>> +        realm_create_rtt_levels(realm, ipa, map_level,
>> +                    RMM_RTT_MAX_LEVEL, memcache);
>> +    }
>> +
>> +    for (size = 0; size < map_size; size += RMM_PAGE_SIZE) {
>> +        if (rmi_granule_delegate(phys)) {
>> +            /*
>> +             * It's likely we raced with another VCPU on the same
>> +             * fault. Assume the other VCPU has handled the fault
>> +             * and return to the guest.
>> +             */
>> +            return 0;
>> +        }
>> +
>> +        ret = rmi_data_create_unknown(rd, phys, ipa);
>> +
>> +        if (RMI_RETURN_STATUS(ret) == RMI_ERROR_RTT) {
>> +            /* Create missing RTTs and retry */
>> +            int level = RMI_RETURN_INDEX(ret);
>> +
>> +            WARN_ON(level == RMM_RTT_MAX_LEVEL);
>> +
>> +            ret = realm_create_rtt_levels(realm, ipa, level,
>> +                              RMM_RTT_MAX_LEVEL,
>> +                              memcache);
>> +            if (ret)
>> +                goto err_undelegate;
>> +
>> +            ret = rmi_data_create_unknown(rd, phys, ipa);
>> +        }
>> +
>> +        if (WARN_ON(ret))
>> +            goto err_undelegate;
>> +
>> +        phys += RMM_PAGE_SIZE;
>> +        ipa += RMM_PAGE_SIZE;
>> +    }
>> +
>> +    if (map_size == RMM_L2_BLOCK_SIZE) {
>> +        ret = fold_rtt(realm, base_ipa, map_level + 1);
>> +        if (WARN_ON(ret))
>> +            goto err;
>> +    }
>> +
>> +    return 0;
>> +
>> +err_undelegate:
>> +    if (WARN_ON(rmi_granule_undelegate(phys))) {
>> +        /* Page can't be returned to NS world so is lost */
>> +        get_page(phys_to_page(phys));
>> +    }
>> +err:
>> +    while (size > 0) {
>> +        unsigned long data, top;
>> +
>> +        phys -= RMM_PAGE_SIZE;
>> +        size -= RMM_PAGE_SIZE;
>> +        ipa -= RMM_PAGE_SIZE;
>> +
>> +        WARN_ON(rmi_data_destroy(rd, ipa, &data, &top));
>> +
>> +        if (WARN_ON(rmi_granule_undelegate(phys))) {
>> +            /* Page can't be returned to NS world so is lost */
>> +            get_page(phys_to_page(phys));
>> +        }
>> +    }
>> +    return -ENXIO;
>> +}
>> +
>> +int realm_map_non_secure(struct realm *realm,
>> +             unsigned long ipa,
>> +             kvm_pfn_t pfn,
>> +             unsigned long size,
>> +             struct kvm_mmu_memory_cache *memcache)
>> +{
>> +    phys_addr_t rd = virt_to_phys(realm->rd);
>> +    phys_addr_t phys = __pfn_to_phys(pfn);
>> +    unsigned long offset;
>> +    int map_size, map_level;
>> +    int ret = 0;
>> +
>> +    if (WARN_ON(!IS_ALIGNED(size, RMM_PAGE_SIZE)))
>> +        return -EINVAL;
>> +
>> +    if (WARN_ON(!IS_ALIGNED(ipa, size)))
>> +        return -EINVAL;
>> +
>> +    if (IS_ALIGNED(size, RMM_L2_BLOCK_SIZE)) {
>> +        map_level = 2;
>> +        map_size = RMM_L2_BLOCK_SIZE;
> 
> Same here, stick to the symbols than digits.

Ack

>> +    } else {
>> +        map_level = 3;
>> +        map_size = RMM_PAGE_SIZE;
>> +    }
>> +
>> +    for (offset = 0; offset < size; offset += map_size) {
>> +        /*
>> +         * realm_map_ipa() enforces that the memory is writable,
> 
> The function names seems to be obsolete, please fix.

realm_map_ipa() is in arch/arm64/kvm/mmu.c and contains...

	/*
	 * Write permission is required for now even though it's possible to
	 * map unprotected pages (granules) as read-only. It's impossible to
	 * map protected pages (granules) as read-only.
	 */
	if (WARN_ON(!(prot & KVM_PGTABLE_PROT_W)))
		return -EFAULT;

...which is what this is referring to.
[And now I've read your follow up email ;) ]

>> +         * so for now we permit both read and write.
>> +         */
>> +        unsigned long desc = phys |
>> +                     PTE_S2_MEMATTR(MT_S2_FWB_NORMAL) |
>> +                     KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R |
>> +                     KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
>> +        ret = rmi_rtt_map_unprotected(rd, ipa, map_level, desc);
>> +
>> +        if (RMI_RETURN_STATUS(ret) == RMI_ERROR_RTT) {
> 
> Could we hit the following case and end up in failure ?
> 
> * Initially a single page is shared and the S2 is mapped
> * Later the Realm shares the entire L2 block and encounters a fault
>   at a new IPA within the L2 block.
> 
> In this case, we may try to L2 mapping when there is a L3 mapping and
> we could encounter (RMI_ERROR_RTT, 2).

Ugh! You are of course correct, this is broken. It turns out this is all
irrelevant as things stand because we don't currently support anything
bigger than (host) PAGE_SIZE mappings (forced in user_mem_abort()).

Given this I'm very much tempted to just delete the code supporting
block mappings for now (just set map_level to RMM_RTT_MAX_LEVEL).

Longer term, I'm not sure what is the best approach, the options are:

1. Drop down and map the region at L3 (ignoring conflicting entries),
   followed by attempting to fold.

2. Destroy the table and directly map at L2.

Option 2 is clearly the most performant, but is potentially racy. In
particular I'm not 100% sure whether you could end up with another
thread attempting to map at L3 between the destroy and map, and
therefore recreating the table.

Thanks,
Steve

> 
>> +            /* Create missing RTTs and retry */
>> +            int level = RMI_RETURN_INDEX(ret);
> 
> So we should probably go down the rtt create step, with the following
> check.
> 
>             if (level < map_level) {
> 
>> +
>> +            ret = realm_create_rtt_levels(realm, ipa, level,
>> +                              map_level, memcache);
>> +            if (ret)
>> +                return -ENXIO;
>> +
>> +            ret = rmi_rtt_map_unprotected(rd, ipa, map_level, desc);
> 
> 
>         } else {
> 
> Otherwise, may be we need to do some more hard work to fix it up.
> 
> 1. If map_level == 3, something is terribly wrong or we raced with
> another thread ?
> 
> 2. If map_level < 3 and we didn't race :
> 
>   a. Going one level down and creating the mappings there and then
> folding. But we could endup dealing with ERROR_RTT,3 as in (1).
> 
>   b. Easiest is to destroy the table at "map_level + 1" and retry the map.
> 
> 
> Suzuki
> 
> 
> 
>> +        }
>> +        /*
>> +         * RMI_ERROR_RTT can be reported for two reasons: either the
>> +         * RTT tables are not there, or there is an RTTE already
>> +         * present for the address.  The call to
>> +         * realm_create_rtt_levels() above handles the first case, and
>> +         * in the second case this indicates that another thread has
>> +         * already populated the RTTE for us, so we can ignore the
>> +         * error and continue.
>> +         */
>> +        if (ret && RMI_RETURN_STATUS(ret) != RMI_ERROR_RTT)
>> +            return -ENXIO;
>> +
>> +        ipa += map_size;
>> +        phys += map_size;
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>>   static int populate_region(struct kvm *kvm,
>>                  phys_addr_t ipa_base,
>>                  phys_addr_t ipa_end,
> 


  parent reply	other threads:[~2025-05-21  9:10 UTC|newest]

Thread overview: 124+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-16 13:41 [PATCH v8 00/43] arm64: Support for Arm CCA in KVM Steven Price
2025-04-16 13:41 ` [PATCH v8 01/43] kvm: arm64: Include kvm_emulate.h in kvm/arm_psci.h Steven Price
2025-04-16 13:41 ` [PATCH v8 02/43] arm64: RME: Handle Granule Protection Faults (GPFs) Steven Price
2025-04-16 13:41 ` [PATCH v8 03/43] arm64: RME: Add SMC definitions for calling the RMM Steven Price
2025-04-25 10:30   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 04/43] arm64: RME: Add wrappers for RMI calls Steven Price
2025-04-25 10:48   ` Suzuki K Poulose
2025-04-25 10:53     ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 05/43] arm64: RME: Check for RME support at KVM init Steven Price
2025-04-25 11:08   ` Suzuki K Poulose
2025-05-01 13:31     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 06/43] arm64: RME: Define the user ABI Steven Price
2025-04-28  8:58   ` Suzuki K Poulose
2025-05-01 13:31     ` Steven Price
2025-05-01 13:47       ` Suzuki K Poulose
2025-04-30  4:25   ` Gavin Shan
2025-05-01 13:44     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 07/43] arm64: RME: ioctls to create and configure realms Steven Price
2025-04-29  9:45   ` Suzuki K Poulose
2025-05-01 15:09     ` Steven Price
2025-04-30  5:39   ` Gavin Shan
2025-05-01 15:11     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 08/43] kvm: arm64: Don't expose debug capabilities for realm guests Steven Price
2025-04-30  5:42   ` Gavin Shan
2025-04-16 13:41 ` [PATCH v8 09/43] KVM: arm64: Allow passing machine type in KVM creation Steven Price
2025-04-30  5:47   ` Gavin Shan
2025-04-16 13:41 ` [PATCH v8 10/43] arm64: RME: RTT tear down Steven Price
2025-04-16 13:41 ` [PATCH v8 11/43] arm64: RME: Allocate/free RECs to match vCPUs Steven Price
2025-05-01 16:50   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 12/43] KVM: arm64: vgic: Provide helper for number of list registers Steven Price
2025-04-30  5:54   ` Gavin Shan
2025-05-01 16:51   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 13/43] arm64: RME: Support for the VGIC in realms Steven Price
2025-05-02 11:04   ` Suzuki K Poulose
2025-05-12 14:44     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 14/43] KVM: arm64: Support timers in realm RECs Steven Price
2025-05-02 12:22   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 15/43] arm64: RME: Allow VMM to set RIPAS Steven Price
2025-04-30 11:38   ` Gavin Shan
2025-05-01 16:00     ` Steven Price
2025-05-01 23:59       ` Gavin Shan
2025-05-06 13:23   ` Suzuki K Poulose
2025-05-12 14:45     ` Steven Price
2025-05-13 10:43       ` Suzuki K Poulose
2025-05-14 10:24         ` Steven Price
2025-04-16 13:41 ` [PATCH v8 16/43] arm64: RME: Handle realm enter/exit Steven Price
2025-04-30 11:55   ` Gavin Shan
2025-05-12 14:45     ` Steven Price
2025-05-07 10:26   ` Suzuki K Poulose
2025-05-12 14:45     ` Steven Price
2025-05-29  4:52   ` Emi Kisanuki (Fujitsu)
2025-06-02 15:14     ` Steven Price
2025-06-02 15:16       ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 17/43] arm64: RME: Handle RMI_EXIT_RIPAS_CHANGE Steven Price
2025-04-30 12:11   ` Gavin Shan
2025-05-16 13:50     ` Steven Price
2025-05-07 10:42   ` Suzuki K Poulose
2025-05-16 13:50     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 18/43] KVM: arm64: Handle realm MMIO emulation Steven Price
2025-05-19 18:11   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 19/43] arm64: RME: Allow populating initial contents Steven Price
2025-04-16 13:41 ` [PATCH v8 20/43] arm64: RME: Runtime faulting of memory Steven Price
2025-05-01  0:16   ` Gavin Shan
2025-05-16 15:33     ` Steven Price
2025-05-20 14:48       ` Suzuki K Poulose
2025-05-21  8:55         ` Steven Price
2025-05-19 17:35   ` Suzuki K Poulose
2025-05-20 14:58     ` Suzuki K Poulose
2025-05-21  9:10     ` Steven Price [this message]
2025-04-16 13:41 ` [PATCH v8 21/43] KVM: arm64: Handle realm VCPU load Steven Price
2025-05-19 17:48   ` Suzuki K Poulose
2025-05-21 10:21     ` Steven Price
2025-04-16 13:41 ` [PATCH v8 22/43] KVM: arm64: Validate register access for a Realm VM Steven Price
2025-05-01  2:54   ` Gavin Shan
2025-05-19 17:56   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 23/43] KVM: arm64: Handle Realm PSCI requests Steven Price
2025-04-16 13:41 ` [PATCH v8 24/43] KVM: arm64: WARN on injected undef exceptions Steven Price
2025-04-16 13:41 ` [PATCH v8 25/43] arm64: Don't expose stolen time for realm guests Steven Price
2025-04-16 13:41 ` [PATCH v8 26/43] arm64: RME: allow userspace to inject aborts Steven Price
2025-04-16 13:41 ` [PATCH v8 27/43] arm64: RME: support RSI_HOST_CALL Steven Price
2025-05-01  2:57   ` Gavin Shan
2025-04-16 13:41 ` [PATCH v8 28/43] arm64: RME: Allow checking SVE on VM instance Steven Price
2025-04-16 13:41 ` [PATCH v8 29/43] arm64: RME: Always use 4k pages for realms Steven Price
2025-05-01  2:59   ` Gavin Shan
2025-05-20 14:59   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 30/43] arm64: RME: Prevent Device mappings for Realms Steven Price
2025-05-20 13:20   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 31/43] arm_pmu: Provide a mechanism for disabling the physical IRQ Steven Price
2025-04-16 13:41 ` [PATCH v8 32/43] arm64: RME: Enable PMU support with a realm guest Steven Price
2025-04-16 13:41 ` [PATCH v8 33/43] arm64: RME: Hide KVM_CAP_READONLY_MEM for realm guests Steven Price
2025-05-01  3:01   ` Gavin Shan
2025-05-20 12:45   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 34/43] arm64: RME: Propagate number of breakpoints and watchpoints to userspace Steven Price
2025-05-01  3:36   ` Gavin Shan
2025-05-01  3:40     ` Gavin Shan
2025-05-01  3:40   ` Gavin Shan
2025-05-20 12:47   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 35/43] arm64: RME: Set breakpoint parameters through SET_ONE_REG Steven Price
2025-05-20 12:48   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 36/43] arm64: RME: Initialize PMCR.N with number counter supported by RMM Steven Price
2025-05-01  3:42   ` Gavin Shan
2025-05-20 12:49   ` Suzuki K Poulose
2025-04-16 13:41 ` [PATCH v8 37/43] arm64: RME: Propagate max SVE vector length from RMM Steven Price
2025-05-01  3:50   ` Gavin Shan
2025-05-20 12:50   ` Suzuki K Poulose
2025-04-16 13:42 ` [PATCH v8 38/43] arm64: RME: Configure max SVE vector length for a Realm Steven Price
2025-05-01  3:50   ` Gavin Shan
2025-05-20 12:52   ` Suzuki K Poulose
2025-04-16 13:42 ` [PATCH v8 39/43] arm64: RME: Provide register list for unfinalized RME RECs Steven Price
2025-05-01 23:30   ` Gavin Shan
2025-04-16 13:42 ` [PATCH v8 40/43] arm64: RME: Provide accurate register list Steven Price
2025-05-01 23:41   ` Gavin Shan
2025-05-20 13:15   ` Suzuki K Poulose
2025-04-16 13:42 ` [PATCH v8 41/43] KVM: arm64: Expose support for private memory Steven Price
2025-05-01  3:04   ` Gavin Shan
2025-04-16 13:42 ` [PATCH v8 42/43] KVM: arm64: Expose KVM_ARM_VCPU_REC to user space Steven Price
2025-05-01  3:04   ` Gavin Shan
2025-04-16 13:42 ` [PATCH v8 43/43] KVM: arm64: Allow activating realms Steven Price
2025-05-01  3:06   ` Gavin Shan
2025-05-20 13:12   ` Suzuki K Poulose
2025-05-02  0:46 ` [PATCH v8 00/43] arm64: Support for Arm CCA in KVM Gavin Shan
2025-05-16 16:00   ` Steven Price
2025-05-15  3:01 ` Emi Kisanuki (Fujitsu)
2025-05-16 15:57   ` Steven Price

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