* [PATCH v2 1/3] arm64: dts: meson-g12-common: specify full DMC range
[not found] <20230327120932.2158389-1-mgonzalez@freebox.fr>
@ 2023-03-27 12:09 ` Marc Gonzalez
2023-03-27 12:09 ` [PATCH v2 2/3] perf/amlogic: resolve conflict between canvas & pmu Marc Gonzalez
2023-03-27 12:09 ` [PATCH v2 3/3] perf/amlogic: adjust register offsets Marc Gonzalez
2 siblings, 0 replies; 7+ messages in thread
From: Marc Gonzalez @ 2023-03-27 12:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Neil Armstrong, Kevin Hilman,
Jerome Brunet, Martin Blumenstingl
Cc: Marc Gonzalez, Pierre-Hugues Husson, linux-amlogic,
linux-arm-kernel, devicetree, linux-kernel
According to S905X2 Datasheet - Revision 07:
DRAM Memory Controller (DMC) register area spans ff638000-ff63a000.
According to DeviceTree Specification - Release v0.4-rc1:
simple-bus nodes do not require reg property.
Fixes: 1499218c80c99a ("arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi")
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 534178eaaf373..a5653ab1f0b43 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1577,10 +1577,9 @@ usb2_phy0: phy@36000 {
dmc: bus@38000 {
compatible = "simple-bus";
- reg = <0x0 0x38000 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
+ ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
canvas: video-lut@48 {
compatible = "amlogic,canvas";
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 2/3] perf/amlogic: resolve conflict between canvas & pmu
[not found] <20230327120932.2158389-1-mgonzalez@freebox.fr>
2023-03-27 12:09 ` [PATCH v2 1/3] arm64: dts: meson-g12-common: specify full DMC range Marc Gonzalez
@ 2023-03-27 12:09 ` Marc Gonzalez
2023-03-27 14:12 ` Neil Armstrong
2023-03-27 12:09 ` [PATCH v2 3/3] perf/amlogic: adjust register offsets Marc Gonzalez
2 siblings, 1 reply; 7+ messages in thread
From: Marc Gonzalez @ 2023-03-27 12:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Neil Armstrong, Kevin Hilman,
Jerome Brunet, Martin Blumenstingl, Jiucheng Xu
Cc: Marc Gonzalez, Pierre-Hugues Husson, linux-amlogic,
linux-arm-kernel, devicetree, linux-kernel
According to S905X2 Datasheet - Revision 07:
DMC_MON area spans 0xff638080-0xff6380c0
DDR_PLL area spans 0xff638c00-0xff638c34
Round DDR_PLL area size up to 0x40
Fixes: 90cf8e21016fa3 ("arm64: dts: meson: Add DDR PMU node")
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index a5653ab1f0b43..1aab65bb5f578 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1585,6 +1585,12 @@ canvas: video-lut@48 {
compatible = "amlogic,canvas";
reg = <0x0 0x48 0x0 0x14>;
};
+
+ pmu: pmu@80 {
+ reg = <0x0 0x80 0x0 0x40>,
+ <0x0 0xc00 0x0 0x40>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
+ };
};
usb2_phy1: phy@3a000 {
@@ -1710,12 +1716,6 @@ internal_ephy: ethernet-phy@8 {
};
};
- pmu: pmu@ff638000 {
- reg = <0x0 0xff638000 0x0 0x100>,
- <0x0 0xff638c00 0x0 0x100>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
- };
-
aobus: bus@ff800000 {
compatible = "simple-bus";
reg = <0x0 0xff800000 0x0 0x100000>;
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 2/3] perf/amlogic: resolve conflict between canvas & pmu
2023-03-27 12:09 ` [PATCH v2 2/3] perf/amlogic: resolve conflict between canvas & pmu Marc Gonzalez
@ 2023-03-27 14:12 ` Neil Armstrong
0 siblings, 0 replies; 7+ messages in thread
From: Neil Armstrong @ 2023-03-27 14:12 UTC (permalink / raw)
To: Marc Gonzalez, Rob Herring, Krzysztof Kozlowski, Kevin Hilman,
Jerome Brunet, Martin Blumenstingl, Jiucheng Xu
Cc: Marc Gonzalez, Pierre-Hugues Husson, linux-amlogic,
linux-arm-kernel, devicetree, linux-kernel
On 27/03/2023 14:09, Marc Gonzalez wrote:
I'll fixup the commit message while applying.
> According to S905X2 Datasheet - Revision 07:
>
> DMC_MON area spans 0xff638080-0xff6380c0
> DDR_PLL area spans 0xff638c00-0xff638c34
>
> Round DDR_PLL area size up to 0x40
>
> Fixes: 90cf8e21016fa3 ("arm64: dts: meson: Add DDR PMU node")
> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
> ---
> arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index a5653ab1f0b43..1aab65bb5f578 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -1585,6 +1585,12 @@ canvas: video-lut@48 {
> compatible = "amlogic,canvas";
> reg = <0x0 0x48 0x0 0x14>;
> };
> +
> + pmu: pmu@80 {
> + reg = <0x0 0x80 0x0 0x40>,
> + <0x0 0xc00 0x0 0x40>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
> + };
> };
>
> usb2_phy1: phy@3a000 {
> @@ -1710,12 +1716,6 @@ internal_ephy: ethernet-phy@8 {
> };
> };
>
> - pmu: pmu@ff638000 {
> - reg = <0x0 0xff638000 0x0 0x100>,
> - <0x0 0xff638c00 0x0 0x100>;
> - interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
> - };
> -
> aobus: bus@ff800000 {
> compatible = "simple-bus";
> reg = <0x0 0xff800000 0x0 0x100000>;
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 3/3] perf/amlogic: adjust register offsets
[not found] <20230327120932.2158389-1-mgonzalez@freebox.fr>
2023-03-27 12:09 ` [PATCH v2 1/3] arm64: dts: meson-g12-common: specify full DMC range Marc Gonzalez
2023-03-27 12:09 ` [PATCH v2 2/3] perf/amlogic: resolve conflict between canvas & pmu Marc Gonzalez
@ 2023-03-27 12:09 ` Marc Gonzalez
2023-03-27 14:17 ` Neil Armstrong
2 siblings, 1 reply; 7+ messages in thread
From: Marc Gonzalez @ 2023-03-27 12:09 UTC (permalink / raw)
To: Jiucheng Xu, Will Deacon, Mark Rutland, Neil Armstrong,
Kevin Hilman, Jerome Brunet, Martin Blumenstingl
Cc: Marc Gonzalez, Pierre-Hugues Husson, linux-amlogic,
linux-arm-kernel, linux-kernel
Commit "perf/amlogic: resolve conflict between canvas & pmu"
changed the base address.
Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver")
Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
---
drivers/perf/amlogic/meson_g12_ddr_pmu.c | 34 +++++++++++++++++-----------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/perf/amlogic/meson_g12_ddr_pmu.c b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
index a78fdb15e26c2..8b643888d5036 100644
--- a/drivers/perf/amlogic/meson_g12_ddr_pmu.c
+++ b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
@@ -21,23 +21,23 @@
#define DMC_QOS_IRQ BIT(30)
/* DMC bandwidth monitor register address offset */
-#define DMC_MON_G12_CTRL0 (0x20 << 2)
-#define DMC_MON_G12_CTRL1 (0x21 << 2)
-#define DMC_MON_G12_CTRL2 (0x22 << 2)
-#define DMC_MON_G12_CTRL3 (0x23 << 2)
-#define DMC_MON_G12_CTRL4 (0x24 << 2)
-#define DMC_MON_G12_CTRL5 (0x25 << 2)
-#define DMC_MON_G12_CTRL6 (0x26 << 2)
-#define DMC_MON_G12_CTRL7 (0x27 << 2)
-#define DMC_MON_G12_CTRL8 (0x28 << 2)
-
-#define DMC_MON_G12_ALL_REQ_CNT (0x29 << 2)
-#define DMC_MON_G12_ALL_GRANT_CNT (0x2a << 2)
-#define DMC_MON_G12_ONE_GRANT_CNT (0x2b << 2)
-#define DMC_MON_G12_SEC_GRANT_CNT (0x2c << 2)
-#define DMC_MON_G12_THD_GRANT_CNT (0x2d << 2)
-#define DMC_MON_G12_FOR_GRANT_CNT (0x2e << 2)
-#define DMC_MON_G12_TIMER (0x2f << 2)
+#define DMC_MON_G12_CTRL0 (0x0 << 2)
+#define DMC_MON_G12_CTRL1 (0x1 << 2)
+#define DMC_MON_G12_CTRL2 (0x2 << 2)
+#define DMC_MON_G12_CTRL3 (0x3 << 2)
+#define DMC_MON_G12_CTRL4 (0x4 << 2)
+#define DMC_MON_G12_CTRL5 (0x5 << 2)
+#define DMC_MON_G12_CTRL6 (0x6 << 2)
+#define DMC_MON_G12_CTRL7 (0x7 << 2)
+#define DMC_MON_G12_CTRL8 (0x8 << 2)
+
+#define DMC_MON_G12_ALL_REQ_CNT (0x9 << 2)
+#define DMC_MON_G12_ALL_GRANT_CNT (0xa << 2)
+#define DMC_MON_G12_ONE_GRANT_CNT (0xb << 2)
+#define DMC_MON_G12_SEC_GRANT_CNT (0xc << 2)
+#define DMC_MON_G12_THD_GRANT_CNT (0xd << 2)
+#define DMC_MON_G12_FOR_GRANT_CNT (0xe << 2)
+#define DMC_MON_G12_TIMER (0xf << 2)
/* Each bit represent a axi line */
PMU_FORMAT_ATTR(event, "config:0-7");
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 3/3] perf/amlogic: adjust register offsets
2023-03-27 12:09 ` [PATCH v2 3/3] perf/amlogic: adjust register offsets Marc Gonzalez
@ 2023-03-27 14:17 ` Neil Armstrong
2023-03-27 15:12 ` Will Deacon
0 siblings, 1 reply; 7+ messages in thread
From: Neil Armstrong @ 2023-03-27 14:17 UTC (permalink / raw)
To: Will Deacon, Marc Gonzalez
Cc: Marc Gonzalez, Jiucheng Xu, Pierre-Hugues Husson, Jerome Brunet,
Kevin Hilman, linux-amlogic, linux-arm-kernel, linux-kernel,
Martin Blumenstingl, Mark Rutland
Hi,
On 27/03/2023 14:09, Marc Gonzalez wrote:
> Commit "perf/amlogic: resolve conflict between canvas & pmu"
> changed the base address.
>
> Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver")
> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
> ---
> drivers/perf/amlogic/meson_g12_ddr_pmu.c | 34 +++++++++++++++++-----------------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/perf/amlogic/meson_g12_ddr_pmu.c b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> index a78fdb15e26c2..8b643888d5036 100644
> --- a/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> +++ b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> @@ -21,23 +21,23 @@
> #define DMC_QOS_IRQ BIT(30)
>
> /* DMC bandwidth monitor register address offset */
> -#define DMC_MON_G12_CTRL0 (0x20 << 2)
> -#define DMC_MON_G12_CTRL1 (0x21 << 2)
> -#define DMC_MON_G12_CTRL2 (0x22 << 2)
> -#define DMC_MON_G12_CTRL3 (0x23 << 2)
> -#define DMC_MON_G12_CTRL4 (0x24 << 2)
> -#define DMC_MON_G12_CTRL5 (0x25 << 2)
> -#define DMC_MON_G12_CTRL6 (0x26 << 2)
> -#define DMC_MON_G12_CTRL7 (0x27 << 2)
> -#define DMC_MON_G12_CTRL8 (0x28 << 2)
> -
> -#define DMC_MON_G12_ALL_REQ_CNT (0x29 << 2)
> -#define DMC_MON_G12_ALL_GRANT_CNT (0x2a << 2)
> -#define DMC_MON_G12_ONE_GRANT_CNT (0x2b << 2)
> -#define DMC_MON_G12_SEC_GRANT_CNT (0x2c << 2)
> -#define DMC_MON_G12_THD_GRANT_CNT (0x2d << 2)
> -#define DMC_MON_G12_FOR_GRANT_CNT (0x2e << 2)
> -#define DMC_MON_G12_TIMER (0x2f << 2)
> +#define DMC_MON_G12_CTRL0 (0x0 << 2)
> +#define DMC_MON_G12_CTRL1 (0x1 << 2)
> +#define DMC_MON_G12_CTRL2 (0x2 << 2)
> +#define DMC_MON_G12_CTRL3 (0x3 << 2)
> +#define DMC_MON_G12_CTRL4 (0x4 << 2)
> +#define DMC_MON_G12_CTRL5 (0x5 << 2)
> +#define DMC_MON_G12_CTRL6 (0x6 << 2)
> +#define DMC_MON_G12_CTRL7 (0x7 << 2)
> +#define DMC_MON_G12_CTRL8 (0x8 << 2)
> +
> +#define DMC_MON_G12_ALL_REQ_CNT (0x9 << 2)
> +#define DMC_MON_G12_ALL_GRANT_CNT (0xa << 2)
> +#define DMC_MON_G12_ONE_GRANT_CNT (0xb << 2)
> +#define DMC_MON_G12_SEC_GRANT_CNT (0xc << 2)
> +#define DMC_MON_G12_THD_GRANT_CNT (0xd << 2)
> +#define DMC_MON_G12_FOR_GRANT_CNT (0xe << 2)
> +#define DMC_MON_G12_TIMER (0xf << 2)
>
> /* Each bit represent a axi line */
> PMU_FORMAT_ATTR(event, "config:0-7");
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Will, I've applied DT patches 1 & 2, can you apply this one via your fixes tree for v6.3 ?
Thanks,
Neil
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 3/3] perf/amlogic: adjust register offsets
2023-03-27 14:17 ` Neil Armstrong
@ 2023-03-27 15:12 ` Will Deacon
2023-03-27 15:27 ` Neil Armstrong
0 siblings, 1 reply; 7+ messages in thread
From: Will Deacon @ 2023-03-27 15:12 UTC (permalink / raw)
To: Neil Armstrong
Cc: Marc Gonzalez, Marc Gonzalez, Jiucheng Xu, Pierre-Hugues Husson,
Jerome Brunet, Kevin Hilman, linux-amlogic, linux-arm-kernel,
linux-kernel, Martin Blumenstingl, Mark Rutland
On Mon, Mar 27, 2023 at 04:17:29PM +0200, Neil Armstrong wrote:
> On 27/03/2023 14:09, Marc Gonzalez wrote:
> > Commit "perf/amlogic: resolve conflict between canvas & pmu"
> > changed the base address.
> >
> > Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver")
> > Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
> > ---
> > drivers/perf/amlogic/meson_g12_ddr_pmu.c | 34 +++++++++++++++++-----------------
> > 1 file changed, 17 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/perf/amlogic/meson_g12_ddr_pmu.c b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> > index a78fdb15e26c2..8b643888d5036 100644
> > --- a/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> > +++ b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
> > @@ -21,23 +21,23 @@
> > #define DMC_QOS_IRQ BIT(30)
> > /* DMC bandwidth monitor register address offset */
> > -#define DMC_MON_G12_CTRL0 (0x20 << 2)
> > -#define DMC_MON_G12_CTRL1 (0x21 << 2)
> > -#define DMC_MON_G12_CTRL2 (0x22 << 2)
> > -#define DMC_MON_G12_CTRL3 (0x23 << 2)
> > -#define DMC_MON_G12_CTRL4 (0x24 << 2)
> > -#define DMC_MON_G12_CTRL5 (0x25 << 2)
> > -#define DMC_MON_G12_CTRL6 (0x26 << 2)
> > -#define DMC_MON_G12_CTRL7 (0x27 << 2)
> > -#define DMC_MON_G12_CTRL8 (0x28 << 2)
> > -
> > -#define DMC_MON_G12_ALL_REQ_CNT (0x29 << 2)
> > -#define DMC_MON_G12_ALL_GRANT_CNT (0x2a << 2)
> > -#define DMC_MON_G12_ONE_GRANT_CNT (0x2b << 2)
> > -#define DMC_MON_G12_SEC_GRANT_CNT (0x2c << 2)
> > -#define DMC_MON_G12_THD_GRANT_CNT (0x2d << 2)
> > -#define DMC_MON_G12_FOR_GRANT_CNT (0x2e << 2)
> > -#define DMC_MON_G12_TIMER (0x2f << 2)
> > +#define DMC_MON_G12_CTRL0 (0x0 << 2)
> > +#define DMC_MON_G12_CTRL1 (0x1 << 2)
> > +#define DMC_MON_G12_CTRL2 (0x2 << 2)
> > +#define DMC_MON_G12_CTRL3 (0x3 << 2)
> > +#define DMC_MON_G12_CTRL4 (0x4 << 2)
> > +#define DMC_MON_G12_CTRL5 (0x5 << 2)
> > +#define DMC_MON_G12_CTRL6 (0x6 << 2)
> > +#define DMC_MON_G12_CTRL7 (0x7 << 2)
> > +#define DMC_MON_G12_CTRL8 (0x8 << 2)
> > +
> > +#define DMC_MON_G12_ALL_REQ_CNT (0x9 << 2)
> > +#define DMC_MON_G12_ALL_GRANT_CNT (0xa << 2)
> > +#define DMC_MON_G12_ONE_GRANT_CNT (0xb << 2)
> > +#define DMC_MON_G12_SEC_GRANT_CNT (0xc << 2)
> > +#define DMC_MON_G12_THD_GRANT_CNT (0xd << 2)
> > +#define DMC_MON_G12_FOR_GRANT_CNT (0xe << 2)
> > +#define DMC_MON_G12_TIMER (0xf << 2)
> > /* Each bit represent a axi line */
> > PMU_FORMAT_ATTR(event, "config:0-7");
>
>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
>
> Will, I've applied DT patches 1 & 2, can you apply this one via your fixes tree for v6.3 ?
If you're sending the DT patches as fixes, you may as well just take this
driver change at the same time with my ack:
Acked-by: Will Deacon <will@kernel.org>
Does that work for you?
Will
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 3/3] perf/amlogic: adjust register offsets
2023-03-27 15:12 ` Will Deacon
@ 2023-03-27 15:27 ` Neil Armstrong
0 siblings, 0 replies; 7+ messages in thread
From: Neil Armstrong @ 2023-03-27 15:27 UTC (permalink / raw)
To: Will Deacon
Cc: Marc Gonzalez, Marc Gonzalez, Jiucheng Xu, Pierre-Hugues Husson,
Jerome Brunet, Kevin Hilman, linux-amlogic, linux-arm-kernel,
linux-kernel, Martin Blumenstingl, Mark Rutland
On 27/03/2023 17:12, Will Deacon wrote:
> On Mon, Mar 27, 2023 at 04:17:29PM +0200, Neil Armstrong wrote:
>> On 27/03/2023 14:09, Marc Gonzalez wrote:
>>> Commit "perf/amlogic: resolve conflict between canvas & pmu"
>>> changed the base address.
>>>
>>> Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver")
>>> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
>>> ---
>>> drivers/perf/amlogic/meson_g12_ddr_pmu.c | 34 +++++++++++++++++-----------------
>>> 1 file changed, 17 insertions(+), 17 deletions(-)
>>>
>>> diff --git a/drivers/perf/amlogic/meson_g12_ddr_pmu.c b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
>>> index a78fdb15e26c2..8b643888d5036 100644
>>> --- a/drivers/perf/amlogic/meson_g12_ddr_pmu.c
>>> +++ b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
>>> @@ -21,23 +21,23 @@
>>> #define DMC_QOS_IRQ BIT(30)
>>> /* DMC bandwidth monitor register address offset */
>>> -#define DMC_MON_G12_CTRL0 (0x20 << 2)
>>> -#define DMC_MON_G12_CTRL1 (0x21 << 2)
>>> -#define DMC_MON_G12_CTRL2 (0x22 << 2)
>>> -#define DMC_MON_G12_CTRL3 (0x23 << 2)
>>> -#define DMC_MON_G12_CTRL4 (0x24 << 2)
>>> -#define DMC_MON_G12_CTRL5 (0x25 << 2)
>>> -#define DMC_MON_G12_CTRL6 (0x26 << 2)
>>> -#define DMC_MON_G12_CTRL7 (0x27 << 2)
>>> -#define DMC_MON_G12_CTRL8 (0x28 << 2)
>>> -
>>> -#define DMC_MON_G12_ALL_REQ_CNT (0x29 << 2)
>>> -#define DMC_MON_G12_ALL_GRANT_CNT (0x2a << 2)
>>> -#define DMC_MON_G12_ONE_GRANT_CNT (0x2b << 2)
>>> -#define DMC_MON_G12_SEC_GRANT_CNT (0x2c << 2)
>>> -#define DMC_MON_G12_THD_GRANT_CNT (0x2d << 2)
>>> -#define DMC_MON_G12_FOR_GRANT_CNT (0x2e << 2)
>>> -#define DMC_MON_G12_TIMER (0x2f << 2)
>>> +#define DMC_MON_G12_CTRL0 (0x0 << 2)
>>> +#define DMC_MON_G12_CTRL1 (0x1 << 2)
>>> +#define DMC_MON_G12_CTRL2 (0x2 << 2)
>>> +#define DMC_MON_G12_CTRL3 (0x3 << 2)
>>> +#define DMC_MON_G12_CTRL4 (0x4 << 2)
>>> +#define DMC_MON_G12_CTRL5 (0x5 << 2)
>>> +#define DMC_MON_G12_CTRL6 (0x6 << 2)
>>> +#define DMC_MON_G12_CTRL7 (0x7 << 2)
>>> +#define DMC_MON_G12_CTRL8 (0x8 << 2)
>>> +
>>> +#define DMC_MON_G12_ALL_REQ_CNT (0x9 << 2)
>>> +#define DMC_MON_G12_ALL_GRANT_CNT (0xa << 2)
>>> +#define DMC_MON_G12_ONE_GRANT_CNT (0xb << 2)
>>> +#define DMC_MON_G12_SEC_GRANT_CNT (0xc << 2)
>>> +#define DMC_MON_G12_THD_GRANT_CNT (0xd << 2)
>>> +#define DMC_MON_G12_FOR_GRANT_CNT (0xe << 2)
>>> +#define DMC_MON_G12_TIMER (0xf << 2)
>>> /* Each bit represent a axi line */
>>> PMU_FORMAT_ATTR(event, "config:0-7");
>>
>>
>> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
>>
>> Will, I've applied DT patches 1 & 2, can you apply this one via your fixes tree for v6.3 ?
>
> If you're sending the DT patches as fixes, you may as well just take this
> driver change at the same time with my ack:
>
> Acked-by: Will Deacon <will@kernel.org>
>
> Does that work for you?
Perfect ! Thx I'll pick it with the DT patches.
Thanks,
Neil
>
> Will
^ permalink raw reply [flat|nested] 7+ messages in thread