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From: Jijie Shao <shaojijie@huawei.com>
To: Paolo Abeni <pabeni@redhat.com>, <yisen.zhuang@huawei.com>,
	<salil.mehta@huawei.com>, <davem@davemloft.net>,
	<edumazet@google.com>, <kuba@kernel.org>
Cc: <shaojijie@huawei.com>, <shenjian15@huawei.com>,
	<wangjie125@huawei.com>, <liuyonglong@huawei.com>,
	<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net 6/7] net: hns3: fix VF reset fail issue
Date: Thu, 2 Nov 2023 20:16:42 +0800	[thread overview]
Message-ID: <c87cfcbc-8cd6-4a01-bac0-74113f7ca904@huawei.com> (raw)
In-Reply-To: <9bc9514044063bc57155fb786f970ca1d69758b4.camel@redhat.com>

on 2023/11/2 18:45, Paolo Abeni wrote:
> On Sat, 2023-10-28 at 10:59 +0800, Jijie Shao wrote:
>>   
>> -static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr)
>> +static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr,
>> +				      bool need_dalay)
>>   {
>> +#define HCLGEVF_RESET_DELAY		5
>> +
>> +	if (need_dalay)
>> +		mdelay(HCLGEVF_RESET_DELAY);
> 5ms delay in an interrupt handler is quite a lot. What about scheduling
> a timer from the IH to clear the register when such delay is needed?
>
> Thanks!
>
> Paolo

Using timer in this case will complicate the code and make maintenance difficult.

We consider reducing the delay time by polling. For example,
the code cycles every 50 us to check whether the write register takes effect.
If yes, the function returns immediately. or the code cycles until 5 ms.

Is this method appropriate?

Thanks!
Jijie


  reply	other threads:[~2023-11-02 12:17 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-28  2:59 [PATCH net 0/7] There are some bugfix for the HNS3 ethernet driver Jijie Shao
2023-10-28  2:59 ` [PATCH net 1/7] net: hns3: fix add VLAN fail issue Jijie Shao
2023-11-02 10:31   ` Paolo Abeni
2023-11-02 12:29     ` Jijie Shao
2023-10-28  2:59 ` [PATCH net 2/7] net: hns3: add barrier in vf mailbox reply process Jijie Shao
2023-10-28  2:59 ` [PATCH net 3/7] net: hns3: fix incorrect capability bit display for copper port Jijie Shao
2023-10-28  2:59 ` [PATCH net 4/7] net: hns3: fix out-of-bounds access may occur when coalesce info is read via debugfs Jijie Shao
2023-10-28  2:59 ` [PATCH net 5/7] net: hns3: fix variable may not initialized problem in hns3_init_mac_addr() Jijie Shao
2023-10-28  2:59 ` [PATCH net 6/7] net: hns3: fix VF reset fail issue Jijie Shao
2023-11-02 10:45   ` Paolo Abeni
2023-11-02 12:16     ` Jijie Shao [this message]
2023-11-02 16:24       ` Paolo Abeni
2023-10-28  2:59 ` [PATCH net 7/7] net: hns3: fix VF wrong speed and duplex issue Jijie Shao

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