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From: Denys Vlasenko <dvlasenk@redhat.com>
To: pbonzini@redhat.com, hpa@zytor.com, bp@suse.de, vbabka@suse.cz,
	tony.luck@intel.com, fenghua.yu@intel.com, jpoimboe@redhat.com,
	bp@alien8.de, brgerst@gmail.com, corbet@lwn.net,
	ravi.v.shankar@intel.com, ricardo.neri-calderon@linux.intel.com,
	torvalds@linux-foundation.org, cmetcalf@mellanox.com,
	akpm@linux-foundation.org, paul.gortmaker@windriver.com,
	mhiramat@kernel.org, luto@kernel.org,
	dave.hansen@linux.intel.com, ray.huang@amd.com, mst@redhat.com,
	linux-kernel@vger.kernel.org, peterz@infradead.org,
	slaoub@gmail.com, mingo@kernel.org, jslaby@suse.cz,
	shuah@kernel.org, tglx@linutronix.de,
	linux-tip-commits@vger.kernel.org
Subject: Re: [tip:x86/asm] x86/umip: Add emulation code for UMIP instructions
Date: Wed, 8 Nov 2017 17:14:33 +0100	[thread overview]
Message-ID: <ca980b88-a668-29cc-3f5a-506088473282@redhat.com> (raw)
In-Reply-To: <tip-1e5db223696afa55e6a038fac638f759e1fdcc01@git.kernel.org>

On 11/08/2017 12:00 PM, tip-bot for Ricardo Neri wrote:
> Commit-ID:  1e5db223696afa55e6a038fac638f759e1fdcc01
> Gitweb:     https://git.kernel.org/tip/1e5db223696afa55e6a038fac638f759e1fdcc01
> Author:     Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> AuthorDate: Sun, 5 Nov 2017 18:27:52 -0800
> Committer:  Ingo Molnar <mingo@kernel.org>
> CommitDate: Wed, 8 Nov 2017 11:16:22 +0100
> 
> x86/umip: Add emulation code for UMIP instructions
> 
> The feature User-Mode Instruction Prevention present in recent Intel
> processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and
> str) from being executed with CPL > 0. Otherwise, a general protection
> fault is issued.

This was arguably an oversight on Intel's part - these insns should have been
protected from the start, as they leak a tiny bit of kernel data.

> Rather than relaying to the user space the general protection fault caused
> by the UMIP-protected instructions (in the form of a SIGSEGV signal), it
> can be trapped and the instruction emulated to provide a dummy result.
> This allows to both conserve the current kernel behavior and not reveal the
> system resources that UMIP intends to protect (i.e., the locations of the
> global descriptor and interrupt descriptor tables, the segment selectors of
> the local descriptor table, the value of the task state register and the
> contents of the CR0 register).
> 
> This emulation is needed because certain applications (e.g., WineHQ and
> DOSEMU2) rely on this subset of instructions to function.

I'm surprised. What in the world they need those insns for?

Wine uses sidt like this, to emulate "mov from r/m to reg" insns:

static LDT_ENTRY idt[256];
...
     case 0x8a: /* mov Eb, Gb */
     case 0x8b: /* mov Ev, Gv */
     {
         BYTE *data = INSTR_GetOperandAddr(context, instr + 1, long_addr,
                                           segprefix, &len);
         unsigned int data_size = (*instr == 0x8b) ? (long_op ? 4 : 2) : 1;
         struct idtr idtr = get_idtr(); <=============================== HERE
         unsigned int offset = data - idtr.base;

         if (offset <= idtr.limit + 1 - data_size)
         {
             idt[1].LimitLow = 0x100; /* FIXME */
             idt[2].LimitLow = 0x11E; /* FIXME */
             idt[3].LimitLow = 0x500; /* FIXME */

             switch (*instr)
             {
             case 0x8a: store_reg_byte( context, instr[1], (BYTE *)idt + offset ); break;
             case 0x8b: store_reg_word( context, instr[1], (BYTE *)idt + offset, long_op ); break;
             }
             context->Eip += prefixlen + len + 1;
             return ExceptionContinueExecution;
         }
         break;  /* Unable to emulate it */
     }

Looks baffling, to say the least... this supports someone who reads
IDT bytes via those insns, and they need to ensure that the values read
from idt[1/2/3].LimitLow are as expected. That's it? Pity git history
doesn't go far enough in the past, and comments are not informative as well...

I did not find smsw or sgdt in Wine git tree.

I did not find smsw, sidt or sgdt in dosemu2-devel git tree.

Can we avoid maintain emulation of these isns, by asking Wine to remove their use instead?

  reply	other threads:[~2017-11-08 16:14 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-06  2:27 [PATCH v11 00/12] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 01/12] x86/insn-eval: Compute linear address in several utility functions Ricardo Neri
2017-11-08 10:57   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 02/12] x86/insn-eval: Add support to resolve 32-bit address encodings Ricardo Neri
2017-11-08 10:58   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 03/12] x86/insn-eval: Add wrapper function for 32 and 64-bit addresses Ricardo Neri
2017-11-08 10:58   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 04/12] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri
2017-11-08 10:59   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 05/12] x86/insn-eval: Add support to resolve 16-bit address encodings Ricardo Neri
2017-11-08 10:59   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 06/12] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-11-08 10:59   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 07/12] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-11-08 11:00   ` [tip:x86/asm] x86/umip: " tip-bot for Ricardo Neri
2017-11-08 16:14     ` Denys Vlasenko [this message]
2017-11-08 16:34       ` Linus Torvalds
2017-11-08 16:38         ` H. Peter Anvin
2017-11-08 16:53         ` Denys Vlasenko
2017-11-08 16:57           ` Linus Torvalds
2017-11-08 17:09             ` Denys Vlasenko
2017-11-08 17:14               ` Paolo Bonzini
2017-11-08 17:24                 ` Denys Vlasenko
2017-11-09  6:17                 ` Ricardo Neri
2017-11-08 17:24           ` Alan Cox
2017-11-09  6:13         ` Ricardo Neri
2017-11-09  6:11       ` Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 08/12] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-11-08 11:00   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 09/12] x86: Enable User-Mode Instruction Prevention at runtime Ricardo Neri
2017-11-08  9:52   ` Ingo Molnar
2017-11-09  5:51     ` Ricardo Neri
2017-11-08 11:01   ` [tip:x86/asm] x86/umip: " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 10/12] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-11-08 11:01   ` [tip:x86/asm] x86/traps: Fix up " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 11/12] selftests/x86: Add tests for User-Mode Instruction Prevention Ricardo Neri
2017-11-08 11:02   ` [tip:x86/asm] " tip-bot for Ricardo Neri
2017-11-06  2:27 ` [PATCH v11 12/12] selftests/x86: Add tests for instruction str and sldt Ricardo Neri
2017-11-08 11:02   ` [tip:x86/asm] selftests/x86: Add tests for the STR and SLDT instructions tip-bot for Ricardo Neri
2017-11-08 10:00 ` [PATCH v11 00/12] x86: Enable User-Mode Instruction Prevention Thomas Gleixner
2017-11-09  5:46   ` Ricardo Neri

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