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From: Jonathan marek <jonathan@marek.ca>
To: freedreno@lists.freedesktop.org,
	Mark Rutland <mark.rutland@arm.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	festevam@gmail.com, Sascha Hauer <s.hauer@pengutronix.de>,
	open list <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Chris.Healy@zii.aero,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	NXP Linux Team <linux-imx@nxp.com>
Subject: Re: [Freedreno] [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes
Date: Mon, 3 Dec 2018 17:23:10 -0500	[thread overview]
Message-ID: <caaa2cfb-6b16-60a6-d679-d8b7437c0d99@marek.ca> (raw)
In-Reply-To: <20181203221032.GA20602@jcrouse-lnx.qualcomm.com>

On 12/03/2018 05:10 PM, Jordan Crouse wrote:
> On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>   arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
>>   arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
>>   2 files changed, 34 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
>> index 67d462715..e9a7bbce9 100644
>> --- a/arch/arm/boot/dts/imx51.dtsi
>> +++ b/arch/arm/boot/dts/imx51.dtsi
>> @@ -628,5 +628,22 @@
>>   				clock-names = "ipg", "ahb";
>>   			};
>>   		};
>> +
>> +		gpu: gpu@30000000 {
>> +			compatible = "amd,imageon-200.1", "amd,imageon";
>> +			reg = <0x30000000 0x20000>;
>> +			reg-names = "kgsl_3d0_reg_memory";
>> +			interrupts = <12>;
>> +			interrupt-names = "kgsl_3d0_irq";
>> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
>> +			clock-names = "core_clk", "mem_iface_clk";
>> +
>> +			qcom,gpu-pwrlevels {
>> +				compatible = "qcom,gpu-pwrlevels";
>> +				qcom,gpu-pwrlevel@0 {
>> +					qcom,gpu-freq = <166250000>;
>> +				};
>> +			};
> 
> There shouldn't be any incremental cost in the source code to use OPP; it should
> just work. And then this won't give us a further reason to keep the legacy
> code around when we decide to dump any pretense of downstream "compatibility".
> 

I will switch to OPP.

>> +		};
>>   	};
>>   };
>> diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
>> index 207eb557c..586d45586 100644
>> --- a/arch/arm/boot/dts/imx53.dtsi
>> +++ b/arch/arm/boot/dts/imx53.dtsi
>> @@ -838,5 +838,22 @@
>>   			reg = <0xf8000000 0x20000>;
>>   			clocks = <&clks IMX5_CLK_OCRAM>;
>>   		};
>> +
>> +		gpu: gpu@30000000 {
>> +			compatible = "amd,imageon-200.0", "amd,imageon";
>> +			reg = <0x30000000 0x20000>;
>> +			reg-names = "kgsl_3d0_reg_memory";
>> +			interrupts = <12>;
>> +			interrupt-names = "kgsl_3d0_irq";
>> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
>> +			clock-names = "core_clk", "mem_iface_clk";
>> +
>> +			qcom,gpu-pwrlevels {
>> +				compatible = "qcom,gpu-pwrlevels";
>> +				qcom,gpu-pwrlevel@0 {
>> +					qcom,gpu-freq = <200000000>;
>> +				};
> 
> Same.
> 
>> +			};
> 
>> +		};
>>   	};
>>   };
>> -- 
>> 2.17.1
> 

  reply	other threads:[~2018-12-03 22:25 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-03 21:18 [PATCH v3 1/4] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment Jonathan Marek
2018-12-03 21:18 ` [PATCH v3 2/4] drm/msm: add headless gpu device for imx5 Jonathan Marek
2018-12-03 21:18 ` [PATCH v3 3/4] drm/msm: implement a2xx mmu Jonathan Marek
2018-12-03 21:18 ` [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes Jonathan Marek
2018-12-03 22:10   ` [Freedreno] " Jordan Crouse
2018-12-03 22:23     ` Jonathan marek [this message]
2018-12-03 22:16   ` Fabio Estevam
2018-12-03 22:21     ` Jonathan marek
2018-12-03 23:06       ` Fabio Estevam

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