From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>,
Hans de Goede <hansg@kernel.org>,
platform-driver-x86@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>,
Xi Pardee <xi.pardee@linux.intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Subject: Re: [PATCH v5 16/16] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery
Date: Fri, 22 May 2026 13:07:46 +0300 (EEST) [thread overview]
Message-ID: <cbc1575c-1ebf-245a-7dd6-1517ee4c2a48@linux.intel.com> (raw)
In-Reply-To: <20260522022147.4137494-17-david.e.box@linux.intel.com>
On Thu, 21 May 2026, David E. Box wrote:
> Add Nova Lake S PMC device IDs to enable binding of the SSRAM telemetry
> driver on NVL platforms, and map them to the ACPI-based discovery policy.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> ---
> V5 - No changes
>
> V4 - No changes
>
> V3 - No changes
>
> V2 - No changes
>
> drivers/platform/x86/intel/pmc/core.h | 5 +++++
> drivers/platform/x86/intel/pmc/ssram_telemetry.c | 16 ++++++++++++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
> index f458eb908c07..eb2e1030dbf3 100644
> --- a/drivers/platform/x86/intel/pmc/core.h
> +++ b/drivers/platform/x86/intel/pmc/core.h
> @@ -334,6 +334,11 @@ enum ppfear_regs {
> #define PMC_DEVID_MTL_IOEP 0x7ecf
> #define PMC_DEVID_MTL_IOEM 0x7ebf
>
> +/* NVL */
> +#define PMC_DEVID_NVL_PCDH 0xd37e
> +#define PMC_DEVID_NVL_PCDS 0xd47e
> +#define PMC_DEVID_NVL_PCHS 0x6e27
These seem to already be in pdx86 repo (from Xi Pardee's change).
--
i.
prev parent reply other threads:[~2026-05-22 10:07 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 2:21 [PATCH v5 00/16] Add ACPI-based PMT discovery support for Intel PMC David E. Box
2026-05-22 2:21 ` [PATCH v5 01/16] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-05-22 2:21 ` [PATCH v5 02/16] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-05-22 2:21 ` [PATCH v5 03/16] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-05-22 2:21 ` [PATCH v5 04/16] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-05-22 2:21 ` [PATCH v5 05/16] platform/x86/intel/pmt: Cache the telemetry discovery header David E. Box
2026-05-22 10:08 ` Ilpo Järvinen
2026-05-22 2:21 ` [PATCH v5 06/16] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-05-22 10:21 ` Ilpo Järvinen
2026-05-28 18:37 ` David Box
2026-05-22 2:21 ` [PATCH v5 07/16] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-05-22 2:21 ` [PATCH v5 08/16] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-05-22 2:21 ` [PATCH v5 09/16] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-05-22 2:21 ` [PATCH v5 10/16] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-05-22 10:37 ` Ilpo Järvinen
2026-05-22 19:49 ` David Box
2026-05-28 19:56 ` David Box
2026-05-22 2:21 ` [PATCH v5 11/16] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper David E. Box
2026-05-22 2:21 ` [PATCH v5 12/16] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-05-22 2:21 ` [PATCH v5 13/16] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe David E. Box
2026-05-29 2:39 ` David Box
2026-05-22 2:21 ` [PATCH v5 14/16] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-05-22 2:21 ` [PATCH v5 15/16] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-05-22 2:21 ` [PATCH v5 16/16] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
2026-05-22 10:07 ` Ilpo Järvinen [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cbc1575c-1ebf-245a-7dd6-1517ee4c2a48@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=david.e.box@linux.intel.com \
--cc=hansg@kernel.org \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=xi.pardee@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome