[PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[John Hubbard]

The Chipset enum lists GPUs in chip-ID order, but FSP capability does
not follow that order. Hopper and Blackwell boot the GSP via FSP, while
Ada, whose chip IDs fall numerically between Hopper and Blackwell, uses
the older SEC2 booter path instead. Add a comment so the table ordering
does not suggest that everything past Hopper uses FSP.

Suggested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
---
Hi,

As mentioned here [1], this is a follow up patch.

[1] https://lore.kernel.org/1022c9e9-7d90-498a-b420-64b945f93c74@nvidia.com

thanks,
John Hubbard


 drivers/gpu/nova-core/gpu.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index b3c91731db45..b9451d0d5e15 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -91,6 +91,10 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
     GA104 = 0x174,
     GA106 = 0x176,
     GA107 = 0x177,
+    // Chipsets are listed in chip-ID order, which does not track FSP
+    // capability. Hopper (GH100) and Blackwell (GB10x/GB20x) boot the GSP
+    // via FSP, but Ada (AD10x), whose chip IDs fall between them, does not.
+    // See Chipset::uses_fsp().
     // Hopper
     GH100 = 0x180,
     // Ada
@@ -137,8 +141,8 @@ pub(crate) const fn needs_fwsec_bootloader(self) -> bool {
         matches!(self.arch(), Architecture::Turing) || matches!(self, Self::GA100)
     }
 
-    /// Returns `true` if this chipset boots via FSP (Hopper and later), which requires the FMC
-    /// firmware image.
+    /// Returns `true` if this chipset boots via FSP (Hopper and Blackwell, but not Ada), which
+    /// requires the FMC firmware image.
     pub(crate) const fn uses_fsp(self) -> bool {
         matches!(
             self.arch(),

base-commit: 550dc7536644db2d67c6f8cf525bba682fba08d9
-- 
2.54.0

Re: [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[Timur Tabi]

On Wed, 2026-06-10 at 16:41 -0700, John Hubbard wrote:
> -    /// Returns `true` if this chipset boots via FSP (Hopper and later), which requires the
> FMC
> -    /// firmware image.
> +    /// Returns `true` if this chipset boots via FSP (Hopper and Blackwell, but not Ada),
> which
> +    /// requires the FMC firmware image.

Actually, I was thinking that we would keep the "Hopper and later" terminology, and just add a
clarification in define_chipset! that the chipid numbering for Ada vs Hopper is backwards, and
that we consider Hopper to be after Ada.

Re: [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[John Hubbard]

On 6/10/26 8:00 PM, Timur Tabi wrote:
> On Wed, 2026-06-10 at 16:41 -0700, John Hubbard wrote:
>> -    /// Returns `true` if this chipset boots via FSP (Hopper and later), which requires the
>> FMC
>> -    /// firmware image.
>> +    /// Returns `true` if this chipset boots via FSP (Hopper and Blackwell, but not Ada),
>> which
>> +    /// requires the FMC firmware image.
> 
> Actually, I was thinking that we would keep the "Hopper and later" terminology, and just add a
> clarification in define_chipset! that the chipid numbering for Ada vs Hopper is backwards, and
> that we consider Hopper to be after Ada.

OK, so here's a diff on top of this patch, to attempt that:

diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index b9451d0d5e15..0344995b3bb8 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -91,10 +91,10 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
     GA104 = 0x174,
     GA106 = 0x176,
     GA107 = 0x177,
-    // Chipsets are listed in chip-ID order, which does not track FSP
-    // capability. Hopper (GH100) and Blackwell (GB10x/GB20x) boot the GSP
-    // via FSP, but Ada (AD10x), whose chip IDs fall between them, does not.
-    // See Chipset::uses_fsp().
+    // Chip IDs are in numerical order, which does not match FSP capability. Hopper (GH100) has a
+    // lower chip ID than Ada (AD10x), but Hopper and Blackwell boot the GSP via FSP while Ada uses
+    // the older SEC2 booter. We therefore consider Hopper to be after Ada, so "Hopper and later"
+    // means Hopper and Blackwell, not Ada.
     // Hopper
     GH100 = 0x180,
     // Ada
@@ -141,8 +141,8 @@ pub(crate) const fn needs_fwsec_bootloader(self) -> bool {
         matches!(self.arch(), Architecture::Turing) || matches!(self, Self::GA100)
     }
 
-    /// Returns `true` if this chipset boots via FSP (Hopper and Blackwell, but not Ada), which
-    /// requires the FMC firmware image.
+    /// Returns `true` if this chipset boots via FSP (Hopper and later), which requires the FMC
+    /// firmware image.
     pub(crate) const fn uses_fsp(self) -> bool {
         matches!(
             self.arch(),


thanks,
-- 
John Hubbard

Re: [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[Timur Tabi]

On Thu, 2026-06-11 at 13:19 -0700, John Hubbard wrote:
> +    // Chip IDs are in numerical order, which does not match FSP capability. Hopper (GH100) has a
> +    // lower chip ID than Ada (AD10x), but Hopper and Blackwell boot the GSP via FSP while Ada
> uses
> +    // the older SEC2 booter. We therefore consider Hopper to be after Ada, so "Hopper and later"
> +    // means Hopper and Blackwell, not Ada.

This is better, except this will be false when Rubin is added.  Since r610 already mentions and
supports Rubin, I think we can safely say:

So "Hopper and later" excludes Ada and just means Hopper, Blackwell, Rubin, and everything after
that.

Re: [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table

[John Hubbard]

On 6/11/26 1:24 PM, Timur Tabi wrote:
> On Thu, 2026-06-11 at 13:19 -0700, John Hubbard wrote:
>> +    // Chip IDs are in numerical order, which does not match FSP capability. Hopper (GH100) has a
>> +    // lower chip ID than Ada (AD10x), but Hopper and Blackwell boot the GSP via FSP while Ada
>> uses
>> +    // the older SEC2 booter. We therefore consider Hopper to be after Ada, so "Hopper and later"
>> +    // means Hopper and Blackwell, not Ada.
> 
> This is better, except this will be false when Rubin is added.  Since r610 already mentions and
> supports Rubin, I think we can safely say:
> 
> So "Hopper and later" excludes Ada and just means Hopper, Blackwell, Rubin, and everything after
> that.

Sounds good. I'll send out a v2 with that.

thanks,
-- 
John Hubbard